diff options
| author | Tejun Heo <tj@kernel.org> | 2011-05-24 11:59:36 +0400 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2011-05-24 11:59:36 +0400 |
| commit | 6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0 (patch) | |
| tree | c9d7fc50a2e2147a5ca07e3096e7eeb916ad2da9 /arch/mips/dec/kn02-irq.c | |
| parent | 0415b00d175e0d8945e6785aad21b5f157976ce0 (diff) | |
| parent | 6ea0c34dac89611126455537552cffe6c7e832ad (diff) | |
| download | linux-6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0.tar.xz | |
Merge branch 'fixes-2.6.39' into for-2.6.40
Diffstat (limited to 'arch/mips/dec/kn02-irq.c')
| -rw-r--r-- | arch/mips/dec/kn02-irq.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index ed90a8deabcc..ef31d98c4fb8 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -27,43 +27,40 @@ */ u32 cached_kn02_csr; - static int kn02_irq_base; - -static inline void unmask_kn02_irq(unsigned int irq) +static void unmask_kn02_irq(struct irq_data *d) { volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); - cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); + cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16)); *csr = cached_kn02_csr; } -static inline void mask_kn02_irq(unsigned int irq) +static void mask_kn02_irq(struct irq_data *d) { volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); - cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); + cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16)); *csr = cached_kn02_csr; } -static void ack_kn02_irq(unsigned int irq) +static void ack_kn02_irq(struct irq_data *d) { - mask_kn02_irq(irq); + mask_kn02_irq(d); iob(); } static struct irq_chip kn02_irq_type = { .name = "KN02-CSR", - .ack = ack_kn02_irq, - .mask = mask_kn02_irq, - .mask_ack = ack_kn02_irq, - .unmask = unmask_kn02_irq, + .irq_ack = ack_kn02_irq, + .irq_mask = mask_kn02_irq, + .irq_mask_ack = ack_kn02_irq, + .irq_unmask = unmask_kn02_irq, }; - void __init init_kn02_irqs(int base) { volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |