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| author | David Daney <david.daney@cavium.com> | 2016-02-02 04:46:54 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 15:01:39 +0300 |
| commit | 7d52ab163c75bb830185f7ea12bae1db87f12b56 (patch) | |
| tree | 4c17ceae61fbbd110059570465b1e13d29e010fa /arch/mips/cavium-octeon/smp.c | |
| parent | 58546e3b735cc9f695bba1559be76a68b072761f (diff) | |
| download | linux-7d52ab163c75bb830185f7ea12bae1db87f12b56.tar.xz | |
MIPS: OCTEON: Extend number of supported CPUs past 32
To support more than 48 CPUs, the bootinfo structure grows a new
coremask structure. Add the definition of the structure and add it to
struct cvmx_bootinfo. In prom_init(), copy the new coremask data into
the sysinfo structure, and use it in smp_setup().
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/smp.c')
| -rw-r--r-- | arch/mips/cavium-octeon/smp.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 61a60e424424..42395c561aa5 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c @@ -103,6 +103,8 @@ static void octeon_smp_setup(void) int cpus; int id; int core_mask = octeon_get_boot_coremask(); + struct cvmx_sysinfo *sysinfo = cvmx_sysinfo_get(); + #ifdef CONFIG_HOTPLUG_CPU unsigned int num_cores = cvmx_octeon_num_cores(); #endif @@ -119,7 +121,7 @@ static void octeon_smp_setup(void) /* The present CPUs get the lowest CPU numbers. */ cpus = 1; for (id = 0; id < NR_CPUS; id++) { - if ((id != coreid) && (core_mask & (1 << id))) { + if ((id != coreid) && cvmx_coremask_is_core_set(&sysinfo->core_mask, id)) { set_cpu_possible(cpus, true); set_cpu_present(cpus, true); __cpu_number_map[id] = cpus; |