diff options
| author | David Woodhouse <dwmw2@infradead.org> | 2007-10-13 17:58:23 +0400 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2007-10-13 17:58:23 +0400 |
| commit | ebf8889bd1fe3615991ff4494635d237280652a2 (patch) | |
| tree | 10fb735717122bbb86474339eac07f26e7ccdf40 /arch/mips/basler/excite/excite_setup.c | |
| parent | b160292cc216a50fd0cd386b0bda2cd48352c73b (diff) | |
| parent | 752097cec53eea111d087c545179b421e2bde98a (diff) | |
| download | linux-ebf8889bd1fe3615991ff4494635d237280652a2.tar.xz | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/mips/basler/excite/excite_setup.c')
| -rw-r--r-- | arch/mips/basler/excite/excite_setup.c | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index 56003188f17c..404ca9284b30 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c @@ -68,7 +68,7 @@ DEFINE_SPINLOCK(titan_lock); int titan_irqflags; -static void excite_timer_init(void) +void __init plat_time_init(void) { const u32 modebit5 = ocd_readl(0x00e4); unsigned int @@ -216,7 +216,7 @@ static int __init excite_platform_init(void) titan_writel(0x80021dff, GXCFG); /* XDMA reset */ titan_writel(0x00000000, CPXCISRA); titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */ -#if defined (CONFIG_HIGHMEM) +#if defined(CONFIG_HIGHMEM) # error change for HIGHMEM support! #else titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */ @@ -261,16 +261,13 @@ void __init plat_mem_setup(void) /* Announce RAM to system */ add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); - /* Set up timer initialization hooks */ - board_time_init = excite_timer_init; - /* Set up the peripheral address map */ - *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; - *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0; - *(boot_ocd_base + (LKB11 / sizeof (u32))) = 0; - *(boot_ocd_base + (LKB12 / sizeof (u32))) = 0; + *(boot_ocd_base + (LKB9 / sizeof(u32))) = 0; + *(boot_ocd_base + (LKB10 / sizeof(u32))) = 0; + *(boot_ocd_base + (LKB11 / sizeof(u32))) = 0; + *(boot_ocd_base + (LKB12 / sizeof(u32))) = 0; wmb(); - *(boot_ocd_base + (LKB0 / sizeof (u32))) = EXCITE_PHYS_OCD >> 4; + *(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4; wmb(); ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5); |