diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2010-10-08 03:03:53 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-10-29 22:08:43 +0400 |
| commit | c9941158fd8a539a56b0e8a4740ec1f6beb23ea3 (patch) | |
| tree | 73e3868737061e1d5b0b61c182ea443e3ccd94e3 /arch/mips/Makefile | |
| parent | 468ffde46d429fbd291b0ef43a06afe9c837629f (diff) | |
| download | linux-c9941158fd8a539a56b0e8a4740ec1f6beb23ea3.tar.xz | |
MIPS: Octeon: Apply CN63XXP1 errata workarounds.
The CN63XXP1 needs a couple of workarounds to ensure memory is not written
in unexpected ways.
All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We
pass a flag to the assembler to cover compiler generated code, and patch
uasm for the dynamically generated code.
The write buffer threshold is reduced to 4.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Makefile')
| -rw-r--r-- | arch/mips/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 1a81240102c5..7c1102e41fe2 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -156,6 +156,7 @@ cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon) -Wa,--trap ifeq (,$(findstring march=octeon, $(cflags-$(CONFIG_CPU_CAVIUM_OCTEON)))) cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -Wa,-march=octeon endif +cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1 cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,) cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,) |