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authorKelvin Cheung <keguang.zhang@gmail.com>2012-07-25 18:17:24 +0400
committerRalf Baechle <ralf@linux-mips.org>2012-07-25 18:17:24 +0400
commitca585cf9fb818bfcfcac6968c2b242dcd0693b08 (patch)
treedd0d228367155b704e150bbfbbd56f7a6a6a00d1 /arch/mips/Kconfig
parent2fa36399e63c911134f28b6878aada9b395c4209 (diff)
downloadlinux-ca585cf9fb818bfcfcac6968c2b242dcd0693b08.tar.xz
MIPS: Loongson 1B: Add board support
Adds basic platform devices for Loongson 1B, including serial port, ethernet, USB, RTC and interrupt handler. The Loongson 1B UART is compatible with NS16550A, the Loongson 1B GMAC is built around a Synopsys IP Core. Use normal instead of enhanced descriptors. Thanks to Giuseppe for updating the normal descriptor in stmmac driver. Thanks to Zhao Zhang for implementing the RTC driver. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4133/ Patchwork: https://patchwork.linux-mips.org/patch/4134/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b3e10fdd3898..73457d18506a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -264,6 +264,16 @@ config MACH_LOONGSON
Chinese Academy of Sciences (CAS) in the People's Republic
of China. The chief architect is Professor Weiwu Hu.
+config MACH_LOONGSON1
+ bool "Loongson 1 family of machines"
+ select SYS_SUPPORTS_ZBOOT
+ help
+ This enables support for the Loongson 1 based machines.
+
+ Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
+ the ICT (Institute of Computing Technology) and the Chinese Academy
+ of Sciences.
+
config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
@@ -836,6 +846,7 @@ source "arch/mips/txx9/Kconfig"
source "arch/mips/vr41xx/Kconfig"
source "arch/mips/cavium-octeon/Kconfig"
source "arch/mips/loongson/Kconfig"
+source "arch/mips/loongson1/Kconfig"
source "arch/mips/netlogic/Kconfig"
endmenu
@@ -1217,6 +1228,14 @@ config CPU_LOONGSON2F
have a similar programming interface with FPGA northbridge used in
Loongson2E.
+config CPU_LOONGSON1B
+ bool "Loongson 1B"
+ depends on SYS_HAS_CPU_LOONGSON1B
+ select CPU_LOONGSON1
+ help
+ The Loongson 1B is a 32-bit SoC, which implements the MIPS32
+ release 2 instruction set.
+
config CPU_MIPS32_R1
bool "MIPS32 Release 1"
depends on SYS_HAS_CPU_MIPS32_R1
@@ -1544,6 +1563,14 @@ config CPU_LOONGSON2
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+config CPU_LOONGSON1
+ bool
+ select CPU_MIPS32
+ select CPU_MIPSR2
+ select CPU_HAS_PREFETCH
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_HIGHMEM
+
config CPU_BMIPS
bool
select CPU_MIPS32
@@ -1562,6 +1589,9 @@ config SYS_HAS_CPU_LOONGSON2F
select CPU_SUPPORTS_ADDRWINCFG if 64BIT
select CPU_SUPPORTS_UNCACHED_ACCELERATED
+config SYS_HAS_CPU_LOONGSON1B
+ bool
+
config SYS_HAS_CPU_MIPS32_R1
bool