diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2010-11-03 05:50:30 +0300 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2011-01-05 08:19:17 +0300 |
| commit | 57015421d3f3deafb1f6ccf03a6fe0539763dbee (patch) | |
| tree | 965daef9dd9f5ee351dec0f4dfa7037a50e94ecc /arch/m68k/include/asm/m520xsim.h | |
| parent | 733f31b764061d976a60c5ee454632d9562900ea (diff) | |
| download | linux-57015421d3f3deafb1f6ccf03a6fe0539763dbee.tar.xz | |
m68knommu: move UART addressing to part specific includes
The ColdFire UART base addresses varies between the different ColdFire
family members. Instead of keeping the base addresses with the UART
definitions keep them with the other addresses definitions for each
ColdFire part.
The motivation for this move is so that when we add new ColdFire
part definitions, they are all in a single file (and we shouldn't
normally need to modify the UART definitions in mcfuart.h at all).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m520xsim.h')
| -rw-r--r-- | arch/m68k/include/asm/m520xsim.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index 85b39edf41a0..8cd8bce38594 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -100,6 +100,7 @@ #define MCFGPIO_PCLRR_UART 0xFC0A402A #define MCFGPIO_PCLRR_FECH 0xFC0A402B #define MCFGPIO_PCLRR_FECL 0xFC0A402C + /* * Generic GPIO support */ @@ -112,7 +113,6 @@ #define MCFGPIO_PIN_MAX 80 #define MCFGPIO_IRQ_MAX 8 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE -/****************************************************************************/ #define MCF_GPIO_PAR_UART (0xA4036) #define MCF_GPIO_PAR_FECI2C (0xA4033) @@ -129,6 +129,13 @@ #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) /* + * UART module. + */ +#define MCFUART_BASE1 0x60000 /* Base address of UART1 */ +#define MCFUART_BASE2 0x64000 /* Base address of UART2 */ +#define MCFUART_BASE3 0x68000 /* Base address of UART2 */ + +/* * Reset Controll Unit. */ #define MCF_RCR 0xFC0A0000 |