diff options
author | Bibo Mao <maobibo@loongson.cn> | 2024-05-06 17:00:47 +0300 |
---|---|---|
committer | Huacai Chen <chenhuacai@loongson.cn> | 2024-05-06 17:00:47 +0300 |
commit | 73516e9da512adc63ba3859fbd82a21f6257348f (patch) | |
tree | b6649ba6ff1a619cc318174f90da4eed684faa1a /arch/loongarch/include/asm/kvm_para.h | |
parent | 9753d3037964fffa5c57de8c57168dc1a4832dd4 (diff) | |
download | linux-73516e9da512adc63ba3859fbd82a21f6257348f.tar.xz |
LoongArch: KVM: Add vcpu mapping from physical cpuid
Physical CPUID is used for interrupt routing for irqchips such as ipi,
msgint and eiointc interrupt controllers. Physical CPUID is stored at
the CSR register LOONGARCH_CSR_CPUID, it can not be changed once vcpu
is created and the physical CPUIDs of two vcpus cannot be the same.
Different irqchips have different size declaration about physical CPUID,
the max CPUID value for CSR LOONGARCH_CSR_CPUID on Loongson-3A5000 is
512, the max CPUID supported by IPI hardware is 1024, while for eiointc
irqchip is 256, and for msgint irqchip is 65536.
The smallest value from all interrupt controllers is selected now, and
the max cpuid size is defines as 256 by KVM which comes from the eiointc
irqchip.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/include/asm/kvm_para.h')
0 files changed, 0 insertions, 0 deletions