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authorIngo Molnar <mingo@kernel.org>2018-12-03 13:42:17 +0300
committerIngo Molnar <mingo@kernel.org>2018-12-03 13:42:17 +0300
commit5f675231e456cb599b283f8361f01cf34b0617df (patch)
treeafb2bdfd6fdbb18336146f41ba7659120a5ff9d2 /arch/csky/include/asm/cache.h
parent3e184501083c38fa091f640acb13af17a21fd228 (diff)
parent2595646791c319cadfdbf271563aac97d0843dc7 (diff)
downloadlinux-5f675231e456cb599b283f8361f01cf34b0617df.tar.xz
Merge tag 'v4.20-rc5' into sched/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/csky/include/asm/cache.h')
-rw-r--r--arch/csky/include/asm/cache.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/csky/include/asm/cache.h b/arch/csky/include/asm/cache.h
new file mode 100644
index 000000000000..d68373463676
--- /dev/null
+++ b/arch/csky/include/asm/cache.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __ASM_CSKY_CACHE_H
+#define __ASM_CSKY_CACHE_H
+
+/* bytes per L1 cache line */
+#define L1_CACHE_SHIFT CONFIG_L1_CACHE_SHIFT
+
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
+
+#ifndef __ASSEMBLY__
+
+void dcache_wb_line(unsigned long start);
+
+void icache_inv_range(unsigned long start, unsigned long end);
+void icache_inv_all(void);
+
+void dcache_wb_range(unsigned long start, unsigned long end);
+void dcache_wbinv_all(void);
+
+void cache_wbinv_range(unsigned long start, unsigned long end);
+void cache_wbinv_all(void);
+
+void dma_wbinv_range(unsigned long start, unsigned long end);
+void dma_wb_range(unsigned long start, unsigned long end);
+
+#endif
+#endif /* __ASM_CSKY_CACHE_H */