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authorMike Frysinger <vapier.adi@gmail.com>2008-11-18 12:48:21 +0300
committerBryan Wu <cooloney@kernel.org>2008-11-18 12:48:21 +0300
commit94b28211d83a7d8e86a8452a1bc65c95853af448 (patch)
tree5b956ca71dbedfea9e8a26fcbb23fd27d71c7417 /arch/blackfin/mach-bf527
parentb5e986c46857a4bed329afd41faec73be24b6d74 (diff)
downloadlinux-94b28211d83a7d8e86a8452a1bc65c95853af448.tar.xz
Blackfin arch: add ANOMALY_05000435 to our headers
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf527')
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index 8d09e6d5c9cd..f3025f67d1cd 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -151,6 +151,8 @@
#define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */
#define ANOMALY_05000432 (ANOMALY_BF526)
+/* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */
+#define ANOMALY_05000435 (ANOMALY_BF526 && __SILICON_REVISION__ < 1 || ANOMALY_BF527)
/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
#define ANOMALY_05000443 (1)