diff options
| author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-07-29 15:10:07 +0300 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-08-07 12:58:48 +0300 |
| commit | 16fd6572e48a3e3ab42cba72a9d7d57881c5fdfd (patch) | |
| tree | 070e2875e7b04220c15172008a7984ce3d403f95 /arch/arm | |
| parent | 288fb7ff8eed8a611af0fa35648a035976ed5108 (diff) | |
| download | linux-16fd6572e48a3e3ab42cba72a9d7d57881c5fdfd.tar.xz | |
ARM: at91/dt: sama5d4: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary.
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/sama5d4.dtsi | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index 1fa8b3611a03..8d1de29e8da1 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -957,8 +957,8 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xf801c000 0x100>; interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb0_clk>; - clock-names = "t0_clk"; + clocks = <&tcb0_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; }; macb0: ethernet@f8020000 { @@ -1185,8 +1185,8 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xfc020000 0x100>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb1_clk>; - clock-names = "t0_clk"; + clocks = <&tcb1_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; }; adc0: adc@fc034000 { @@ -1270,11 +1270,13 @@ rstc@fc068600 { compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; reg = <0xfc068600 0x10>; + clocks = <&clk32k>; }; shdwc@fc068610 { compatible = "atmel,at91sam9x5-shdwc"; reg = <0xfc068610 0x10>; + clocks = <&clk32k>; }; pit: timer@fc068630 { @@ -1287,6 +1289,7 @@ watchdog@fc068640 { compatible = "atmel,at91sam9260-wdt"; reg = <0xfc068640 0x10>; + clocks = <&clk32k>; status = "disabled"; }; @@ -1320,6 +1323,7 @@ compatible = "atmel,at91rm9200-rtc"; reg = <0xfc0686b0 0x30>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; }; dbgu: serial@fc069000 { |