diff options
| author | Sjoerd Simons <sjoerd.simons@collabora.co.uk> | 2015-10-08 16:31:17 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-10-13 11:59:06 +0300 |
| commit | 874e568e500aeed7d54820c21f3854f3ffa1f59d (patch) | |
| tree | 7e815f85295b598276b300a36b4fa7d9c7714f8b /arch/arm | |
| parent | d97e862ef6ae3f46465f00f9bf043c0df125b899 (diff) | |
| download | linux-874e568e500aeed7d54820c21f3854f3ffa1f59d.tar.xz | |
ARM: dts: rockchip: Add SPDIF transceiver for RK3288
Add the SPDIF transceiver controller definition and pin setup for RK3288
SoCs
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index d6c2f9116646..12ae3450be54 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -744,6 +744,21 @@ status = "disabled"; }; + spdif: sound@ff88b0000 { + compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif"; + reg = <0xff8b0000 0x10000>; + #sound-dai-cells = <0>; + clock-names = "hclk", "mclk"; + clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>; + dmas = <&dmac_bus_s 3>; + dma-names = "tx"; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx>; + rockchip,grf = <&grf>; + status = "disabled"; + }; + i2s: i2s@ff890000 { compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; reg = <0xff890000 0x10000>; @@ -1437,5 +1452,11 @@ <4 3 3 &pcfg_pull_none>; }; }; + + spdif { + spdif_tx: spdif-tx { + rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>; + }; + }; }; }; |