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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-11-21 14:30:36 +0300
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-22 14:05:33 +0300
commit26bbf0b57a0848932f725076bcb1245ca696e8d3 (patch)
treeb55a13203002c0d0295ecacd1fc4883ffcc9240c /arch/arm
parentd30e45eeabefadc6039d7f876a59e5f5f6cb11c6 (diff)
downloadlinux-26bbf0b57a0848932f725076bcb1245ca696e8d3.tar.xz
ARM: pgtable: remove L2 cache flushes for SMP page table bring-up
The MMU is always configured to read page tables from the L2 cache so there's little point flushing them out of the L2 cache back to RAM. Remove these flushes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/kernel/smp.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8c1959590252..46313805f430 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -85,7 +85,6 @@ static inline void identity_mapping_add(pgd_t *pgd, unsigned long start,
pmd[1] = __pmd(addr | prot);
addr += SECTION_SIZE;
flush_pmd_entry(pmd);
- outer_clean_range(__pa(pmd), __pa(pmd + 1));
}
}
@@ -100,7 +99,6 @@ static inline void identity_mapping_del(pgd_t *pgd, unsigned long start,
pmd[0] = __pmd(0);
pmd[1] = __pmd(0);
clean_pmd_entry(pmd);
- outer_clean_range(__pa(pmd), __pa(pmd + 1));
}
}