diff options
| author | Jon Hunter <jonathanh@nvidia.com> | 2016-03-17 17:19:05 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-04-12 18:10:26 +0300 |
| commit | e7d9b2709ab04059b6a5f0ff016826dc4d4f96e4 (patch) | |
| tree | 6493b4bedee219c422b17e7568bc1366e02743d7 /arch/arm | |
| parent | f5bbb327a4e896a7f353762068b786852d98187b (diff) | |
| download | linux-e7d9b2709ab04059b6a5f0ff016826dc4d4f96e4.tar.xz | |
ARM: tegra: Correct interrupt type for ARM TWD
The ARM TWD interrupt is a private peripheral interrupt (PPI) and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED. For Tegra20/30 devices the PPI type cannot be
set and so when we attempt to set the type for the ARM TWD interrupt it
fails. This has gone unnoticed because it fails silently and because we
cannot re-configure the type it has had no impact. Nevertheless fix the
type for the TWD interrupt so that it matches the hardware configuration.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 8fb61b93c226..2207c08e3fa3 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -145,7 +145,7 @@ interrupt-parent = <&intc>; reg = <0x50040600 0x20>; interrupts = <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; clocks = <&tegra_car TEGRA20_CLK_TWD>; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index c6edc8cea34e..5030065cbdfe 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -230,7 +230,7 @@ reg = <0x50040600 0x20>; interrupt-parent = <&intc>; interrupts = <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; clocks = <&tegra_car TEGRA30_CLK_TWD>; }; |