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authorVignesh R <vigneshr@ti.com>2016-04-20 14:33:00 +0300
committerTony Lindgren <tony@atomide.com>2016-04-26 20:52:19 +0300
commitb7a1922814c617884a3fee9b107ffb784fa4cf94 (patch)
treed5fb949550369dcef0c791d4c3e89a4bb2cd20dc /arch/arm
parent626180785f5d9443c475d2b2760f64bb510f2b66 (diff)
downloadlinux-b7a1922814c617884a3fee9b107ffb784fa4cf94.tar.xz
ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts6
-rw-r--r--arch/arm/boot/dts/dra72-evm-common.dtsi6
2 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 98bc5ca43340..bafcfac067ec 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -664,15 +664,13 @@
&qspi {
status = "okay";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
m25p80@0 {
compatible = "s25fl256s1";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
- spi-cpol;
- spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 2894759276d0..093538ea5b5f 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -681,15 +681,13 @@
&qspi {
status = "okay";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
m25p80@0 {
compatible = "s25fl256s1";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
- spi-cpol;
- spi-cpha;
#address-cells = <1>;
#size-cells = <1>;