diff options
| author | Antoine Tenart <antoine.tenart@free-electrons.com> | 2015-10-01 17:39:43 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-11-22 17:33:54 +0300 |
| commit | 74194620add1fb9984184873a9dbf8a1002a00c2 (patch) | |
| tree | f1bdb43e91e225b232dc57aa911ca5dbf7d53f4b /arch/arm | |
| parent | bb1ea8bf1bed9048dc51cb0b9ccacd63fcb0a3a0 (diff) | |
| download | linux-74194620add1fb9984184873a9dbf8a1002a00c2.tar.xz | |
ARM: sun5i: chip: add a node for the w1 gpio controller
The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/sun5i-r8-chip.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index e616084b9495..059d86865b73 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -81,6 +81,13 @@ pinctrl-0 = <&chip_wifi_reg_on_pin>; reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */ }; + + onewire { + compatible = "w1-gpio"; + gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ + pinctrl-names = "default"; + pinctrl-0 = <&chip_w1_pin>; + }; }; &be0 { @@ -181,6 +188,13 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + chip_w1_pin: chip_w1_pin@0 { + allwinner,pins = "PD2"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; ®_dcdc2 { |