diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-05-13 18:45:18 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-05-13 18:45:18 +0300 |
| commit | 6c60000f0b9ae7da630a5715a9ba33042d87e7fd (patch) | |
| tree | ed82e48e2cf493349d976552b20a352a071ab689 /arch/arm | |
| parent | d65e1a0f305ba3e7aabf6261a37bb871790d9f93 (diff) | |
| parent | 0cb7e0c617c6aa3da46514ee5982bd7de11a2b2e (diff) | |
| download | linux-6c60000f0b9ae7da630a5715a9ba33042d87e7fd.tar.xz | |
Merge tag 'soc-dt-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"The updates this time are a bit smaller than most times, mainly
because it is not totally dominated by new Qualcomm hardware support.
Instead, we larger than average updates for Rockchips, NXP, Allwinner
and TI. The only two new SoCs this time are both from NXP and are
minor variants of already supported ones.
The updates for aspeed, amlogic and mediatek came a little late, so
I'm saving those for part 2 in a few days if everything turns out
fine.
New machines this time contain:
- two Broadcom SoC based wireless routers from Asus
- Five allwinner based consumer devices for gaming, set-top-box and
eboot reader applications
- Three older phones based on Qualcomm chips, plus the more recent
Sony Xperia 1 V
- 14 industrial and embedded boards based on NXP i.MX6, i.MX8,
layerscape and s32g3 SoCs
- six rockchips boards including another handheld game console and a
few single-board computers
On top of these, we have the usual cleanups for dtc warnings and
updates to add more features to already merged machines"
* tag 'soc-dt-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (612 commits)
arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address
arm64: dts: marvell: turris-mox: drop unneeded flash address/size-cells
arm64: dts: marvell: eDPU: drop redundant address/size-cells
arm64: dts: qcom: pm6150: correct USB VBUS regulator compatible
arm64: dts: rockchip: add rk3588 pcie and php IOMMUs
arm64: dts: rockchip: enable onboard spi flash for rock-3a
arm64: dts: rockchip: add USB-C support to rk3588s-orangepi-5
arm64: dts: rockchip: Enable GPU on Orange Pi 5
arm64: dts: rockchip: enable GPU on khadas-edge2
arm64: dts: rockchip: Add USB3 on Edgeble NCM6A-IO board
arm64: dts: rockchip: Support poweroff on Edgeble Neural Compute Module
arm64: dts: rockchip: Add Radxa ROCK 3C
dt-bindings: arm: rockchip: add Radxa ROCK 3C
arm64: dts: exynos: gs101: specify empty clocks for remaining pinctrl
arm64: dts: exynos: gs101: specify bus clock for pinctrl_hsi2
arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
arm64: dts: exynos: gs101: specify bus clock for pinctrl (far) alive
arm64: dts: Add/fix /memory node unit-addresses
arm64: dts: qcom: qcs404: fix bluetooth device address
arm64: dts: qcom: sc8280xp-x13s: enable USB MP and fingerprint reader
...
Diffstat (limited to 'arch/arm')
196 files changed, 7258 insertions, 3841 deletions
diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile index 2d26c3397f14..4247f19b1adc 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -61,6 +61,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \ sun5i-a13-olinuxino.dtb \ sun5i-a13-olinuxino-micro.dtb \ sun5i-a13-pocketbook-touch-lux-3.dtb \ + sun5i-a13-pocketbook-614-plus.dtb \ sun5i-a13-q8-tablet.dtb \ sun5i-a13-utoo-p66.dtb \ sun5i-gr8-chip-pro.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts b/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts new file mode 100644 index 000000000000..ab8d138dc11d --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun5i-a13-pocketbook-614-plus.dts @@ -0,0 +1,218 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2024 Denis Burkov <hitechshell@mail.ru> + */ + +/dts-v1/; +#include "sun5i-a13.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "PocketBook 614 Plus"; + compatible = "pocketbook,614-plus", "allwinner,sun5i-a13"; + + aliases { + serial0 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_POWER; + linux,default-trigger = "default-on"; + gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */ + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-0 { + label = "Right"; + linux,code = <KEY_NEXT>; + gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; /* PG9 */ + }; + + key-1 { + label = "Left"; + linux,code = <KEY_PREVIOUS>; + gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */ + }; + }; + + reg_3v3_mmc0: regulator-mmc0 { + compatible = "regulator-fixed"; + regulator-name = "vdd-mmc0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 4 4 GPIO_ACTIVE_LOW>; /* PE4 */ + vin-supply = <®_vcc3v3>; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupts = <0>; + }; +}; + +#include "axp209.dtsi" + +&i2c1 { + status = "okay"; + + pcf8563: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + }; +}; + +&lradc { + vref-supply = <®_ldo2>; + status = "okay"; + + button-300 { + label = "Down"; + linux,code = <KEY_DOWN>; + channel = <0>; + voltage = <300000>; + }; + + button-700 { + label = "Up"; + linux,code = <KEY_UP>; + channel = <0>; + voltage = <700000>; + }; + + button-1000 { + label = "Left"; + linux,code = <KEY_LEFT>; + channel = <0>; + voltage = <1000000>; + }; + + button-1200 { + label = "Menu"; + linux,code = <KEY_MENU>; + channel = <0>; + voltage = <1200000>; + }; + + button-1500 { + label = "Right"; + linux,code = <KEY_RIGHT>; + channel = <0>; + voltage = <1500000>; + }; +}; + +&mmc0 { + vmmc-supply = <®_3v3_mmc0>; + bus-width = <4>; + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_4bit_pc_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb0_vbus { + status = "okay"; + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ +}; + +®_usb1_vbus { + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pg_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi b/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi index 3325ab07094a..2c9152b151be 100644 --- a/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/allwinner/sun5i-a13.dtsi @@ -62,14 +62,14 @@ }; trips { - cpu_alert0: cpu_alert0 { + cpu_alert0: cpu-alert0 { /* milliCelsius */ temperature = <85000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit: cpu_crit { + cpu_crit: cpu-crit { /* milliCelsius */ temperature = <100000>; hysteresis = <2000>; diff --git a/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts b/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts index 5c3562b85a5b..ffbd99c176db 100644 --- a/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts +++ b/arch/arm/boot/dts/allwinner/sun5i-gr8-chip-pro.dts @@ -77,7 +77,7 @@ }; }; - mmc0_pwrseq: mmc0_pwrseq { + mmc0_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */ }; diff --git a/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts b/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts index 4192c23848c3..8c784a2c086e 100644 --- a/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/allwinner/sun5i-r8-chip.dts @@ -77,7 +77,7 @@ }; }; - mmc0_pwrseq: mmc0_pwrseq { + mmc0_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */ }; diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts index 236ebfc06192..5bce7a32651e 100644 --- a/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts @@ -109,7 +109,7 @@ }; }; - reg_vga_3v3: vga_3v3_regulator { + reg_vga_3v3: vga-3v3-regulator { compatible = "regulator-fixed"; regulator-name = "vga-3v3"; regulator-min-microvolt = <3300000>; @@ -119,7 +119,7 @@ gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */ }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */ }; diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi index 5cce4918f84c..f0145d6b9c53 100644 --- a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi @@ -179,14 +179,14 @@ }; trips { - cpu_alert0: cpu_alert0 { + cpu_alert0: cpu-alert0 { /* milliCelsius */ temperature = <70000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit: cpu_crit { + cpu_crit: cpu-crit { /* milliCelsius */ temperature = <100000>; hysteresis = <2000>; @@ -1318,7 +1318,7 @@ compatible = "allwinner,sun6i-a31-prcm"; reg = <0x01f01400 0x200>; - ar100: ar100_clk { + ar100: ar100-clk { compatible = "allwinner,sun6i-a31-ar100-clk"; #clock-cells = <0>; clocks = <&rtc CLK_OSC32K>, <&osc24M>, @@ -1327,7 +1327,7 @@ clock-output-names = "ar100"; }; - ahb0: ahb0_clk { + ahb0: ahb0-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <1>; @@ -1336,14 +1336,14 @@ clock-output-names = "ahb0"; }; - apb0: apb0_clk { + apb0: apb0-clk { compatible = "allwinner,sun6i-a31-apb0-clk"; #clock-cells = <0>; clocks = <&ahb0>; clock-output-names = "apb0"; }; - apb0_gates: apb0_gates_clk { + apb0_gates: apb0-gates-clk { compatible = "allwinner,sun6i-a31-apb0-gates-clk"; #clock-cells = <1>; clocks = <&apb0>; @@ -1353,14 +1353,14 @@ "apb0_i2c"; }; - ir_clk: ir_clk { + ir_clk: ir-clk { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; clocks = <&rtc CLK_OSC32K>, <&osc24M>; clock-output-names = "ir"; }; - apb0_rst: apb0_rst { + apb0_rst: apb0-rst { compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; }; diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts index 96554ab4f6d3..f63d67ec9887 100644 --- a/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts +++ b/arch/arm/boot/dts/allwinner/sun6i-a31s-sinovoip-bpi-m2.dts @@ -75,7 +75,7 @@ }; }; - mmc2_pwrseq: mmc2_pwrseq { + mmc2_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */ }; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts index caa935ca4f19..f2d7fab9978d 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi-m1-plus.dts @@ -86,7 +86,7 @@ }; }; - mmc3_pwrseq: mmc3_pwrseq { + mmc3_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */ }; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts index 52160e368304..be9b31d0f4b5 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts @@ -96,7 +96,7 @@ }; }; - mmc3_pwrseq: mmc3_pwrseq { + mmc3_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */ clocks = <&ccu CLK_OUT_A>; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts index 3def2a330598..f1e26b75cd90 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-hummingbird.dts @@ -65,7 +65,7 @@ stdout-path = "serial0:115200n8"; }; - reg_mmc3_vdd: mmc3_vdd { + reg_mmc3_vdd: regulator-mmc3-vdd { compatible = "regulator-fixed"; regulator-name = "mmc3_vdd"; regulator-min-microvolt = <3000000>; @@ -74,7 +74,7 @@ gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ }; - reg_gmac_vdd: gmac_vdd { + reg_gmac_vdd: regulator-gmac-vdd { compatible = "regulator-fixed"; regulator-name = "gmac_vdd"; regulator-min-microvolt = <3000000>; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts index 20bf09b2226c..fb835730bbc4 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb-emmc.dts @@ -14,7 +14,7 @@ model = "Olimex A20-Olimex-SOM-EVB-eMMC"; compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20"; - mmc2_pwrseq: mmc2_pwrseq { + mmc2_pwrseq: pwrseq { compatible = "mmc-pwrseq-emmc"; reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts index a59755a2e7a9..e8977c2fe798 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb-emmc.dts @@ -13,7 +13,7 @@ model = "Olimex A20-SOM204-EVB-eMMC"; compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20"; - mmc2_pwrseq: mmc2_pwrseq { + mmc2_pwrseq: pwrseq-1 { compatible = "mmc-pwrseq-emmc"; reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts index 54af6c18075b..a55406657449 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts @@ -65,7 +65,7 @@ }; }; - rtl_pwrseq: rtl_pwrseq { + rtl_pwrseq: pwrseq-0 { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; }; @@ -177,7 +177,7 @@ non-removable; status = "okay"; - rtl8723bs: sdio_wifi@1 { + rtl8723bs: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts index ecb91fb899ff..435a189332e8 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts @@ -82,7 +82,7 @@ }; }; - reg_axp_ipsout: axp_ipsout { + reg_axp_ipsout: regulator-axp-ipsout { compatible = "regulator-fixed"; regulator-name = "axp-ipsout"; regulator-min-microvolt = <5000000>; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts index 3bfae98f3cc3..29199b6a3b4a 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts +++ b/arch/arm/boot/dts/allwinner/sun7i-a20-wits-pro-a20-dkt.dts @@ -60,7 +60,7 @@ stdout-path = "serial0:115200n8"; }; - mmc3_pwrseq: mmc3_pwrseq { + mmc3_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */ }; diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi b/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi index 5574299685ab..5f44f09c5545 100644 --- a/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi @@ -153,14 +153,14 @@ }; trips { - cpu_alert0: cpu_alert0 { + cpu_alert0: cpu-alert0 { /* milliCelsius */ temperature = <75000>; hysteresis = <2000>; type = "passive"; }; - cpu_crit: cpu_crit { + cpu_crit: cpu-crit { /* milliCelsius */ temperature = <100000>; hysteresis = <2000>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi index cd4bf60dbb3c..2af8382ccdf5 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-a23-a33.dtsi @@ -108,7 +108,7 @@ #size-cells = <1>; ranges; - osc24M: osc24M_clk { + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -116,7 +116,7 @@ clock-output-names = "osc24M"; }; - ext_osc32k: ext_osc32k_clk { + ext_osc32k: ext-osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; @@ -733,7 +733,7 @@ compatible = "allwinner,sun8i-a23-prcm"; reg = <0x01f01400 0x200>; - ar100: ar100_clk { + ar100: ar100-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <1>; @@ -742,7 +742,7 @@ clock-output-names = "ar100"; }; - ahb0: ahb0_clk { + ahb0: ahb0-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <1>; @@ -751,14 +751,14 @@ clock-output-names = "ahb0"; }; - apb0: apb0_clk { + apb0: apb0-clk { compatible = "allwinner,sun8i-a23-apb0-clk"; #clock-cells = <0>; clocks = <&ahb0>; clock-output-names = "apb0"; }; - apb0_gates: apb0_gates_clk { + apb0_gates: apb0-gates-clk { compatible = "allwinner,sun8i-a23-apb0-gates-clk"; #clock-cells = <1>; clocks = <&apb0>; @@ -767,7 +767,7 @@ "apb0_i2c"; }; - apb0_rst: apb0_rst { + apb0_rst: apb0-rst { compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts index d5f6aebd7216..0c585a6d990d 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2407pxe03.dts @@ -52,7 +52,7 @@ ethernet0 = &esp8089; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */ /* The esp8089 needs 200 ms after driving wifi-en high */ @@ -76,7 +76,7 @@ non-removable; status = "okay"; - esp8089: sdio_wifi@1 { + esp8089: wifi@1 { compatible = "esp,esp8089"; reg = <1>; esp,crystal-26M-en = <2>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts index 9f9232a2fefb..63cb4e194a03 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a23-polaroid-mid2809pxe04.dts @@ -52,7 +52,7 @@ ethernet0 = &esp8089; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */ /* The esp8089 needs 200 ms after driving wifi-en high */ @@ -69,7 +69,7 @@ non-removable; status = "okay"; - esp8089: sdio_wifi@1 { + esp8089: wifi@1 { compatible = "esp,esp8089"; reg = <1>; esp,crystal-26M-en = <2>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts index 2dfdd0a3151e..f00ce03ffc84 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a33-ga10h-v1.1.dts @@ -85,7 +85,7 @@ non-removable; status = "okay"; - rtl8703as: sdio_wifi@1 { + rtl8703as: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts index 065cb620aa99..162ba93f7484 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a33-inet-d978-rev2.dts @@ -78,7 +78,7 @@ non-removable; status = "okay"; - rtl8723bs: sdio_wifi@1 { + rtl8723bs: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi index 30fdd2703b1f..36b2d78cdab9 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-a33.dtsi @@ -323,35 +323,35 @@ }; trips { - cpu_alert0: cpu_alert0 { + cpu_alert0: cpu-alert0 { /* milliCelsius */ temperature = <75000>; hysteresis = <2000>; type = "passive"; }; - gpu_alert0: gpu_alert0 { + gpu_alert0: gpu-alert0 { /* milliCelsius */ temperature = <85000>; hysteresis = <2000>; type = "passive"; }; - cpu_alert1: cpu_alert1 { + cpu_alert1: cpu-alert1 { /* milliCelsius */ temperature = <90000>; hysteresis = <2000>; type = "hot"; }; - gpu_alert1: gpu_alert1 { + gpu_alert1: gpu-alert1 { /* milliCelsius */ temperature = <95000>; hysteresis = <2000>; type = "hot"; }; - cpu_crit: cpu_crit { + cpu_crit: cpu-crit { /* milliCelsius */ temperature = <110000>; hysteresis = <2000>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts index 8d56b103f063..32e811fa23e2 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3.dts @@ -95,7 +95,7 @@ gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&ac100_rtc 1>; clock-names = "ext_clock"; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts index 870993393fc2..d5e6ddaffbce 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-cubietruck-plus.dts @@ -144,7 +144,7 @@ compatible = "linux,spdif-dit"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&ac100_rtc 1>; clock-names = "ext_clock"; diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts index a7d4ca308990..43982b106a4d 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-tbs-a711.dts @@ -123,7 +123,7 @@ vin-supply = <®_vbat>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi index 94eb3bfc989e..addf0cb0f465 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi @@ -164,7 +164,7 @@ ranges; /* TODO: PRCM block has a mux for this. */ - osc24M: osc24M_clk { + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -177,14 +177,14 @@ * It is an internal RC-based oscillator. * TODO: Its controls are in the PRCM block. */ - osc16M: osc16M_clk { + osc16M: osc16M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <16000000>; clock-output-names = "osc16M"; }; - osc16Md512: osc16Md512_clk { + osc16Md512: osc16Md512-clk { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <512>; @@ -1127,7 +1127,7 @@ #reset-cells = <1>; }; - r_cpucfg@1f01c00 { + cpucfg@1f01c00 { compatible = "allwinner,sun8i-a83t-r-cpucfg"; reg = <0x1f01c00 0x400>; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts index d729b7c705db..d3a7c9fa23e4 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts @@ -103,7 +103,7 @@ cpu-supply = <®_vcc1v2>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ clocks = <&rtc CLK_OSC32K_FANOUT>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts index 3356f4210d45..79b03b31c5eb 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-r1.dts @@ -43,11 +43,12 @@ /* Orange Pi R1 is based on Orange Pi Zero design */ #include "sun8i-h2-plus-orangepi-zero.dts" +/delete-node/ ®_vcc_wifi; + / { model = "Xunlong Orange Pi R1"; compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus"; - /delete-node/ reg_vcc_wifi; /* * Ths pin of this regulator is the same with the Wi-Fi extra @@ -89,7 +90,7 @@ vmmc-supply = <®_vcc3v3>; vqmmc-supply = <®_vcc3v3>; - rtl8189etv: sdio_wifi@1 { + rtl8189etv: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts index 3706216ffb40..1b001f2ad0ef 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts @@ -80,7 +80,7 @@ }; }; - reg_vcc_wifi: reg_vcc_wifi { + reg_vcc_wifi: reg-vcc-wifi { compatible = "regulator-fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -105,7 +105,7 @@ states = <1100000 0>, <1300000 1>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; post-power-on-delay-ms = <200>; @@ -149,7 +149,7 @@ * Explicitly define the sdio device, so that we can add an ethernet * alias for it (which e.g. makes u-boot set a mac-address). */ - xr819: sdio_wifi@1 { + xr819: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts index a6d38ecee141..5b77300307de 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-beelink-x2.dts @@ -122,7 +122,7 @@ compatible = "linux,spdif-dit"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ clocks = <&rtc CLK_OSC32K_FANOUT>; @@ -185,7 +185,7 @@ * Explicitly define the sdio device, so that we can add an ethernet * alias for it (which e.g. makes u-boot set a mac-address). */ - sdiowifi: sdio_wifi@1 { + sdiowifi: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts index 343b02b97155..2b0566d4b386 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts @@ -87,7 +87,7 @@ vin-supply = <®_vcc5v0>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ clocks = <&rtc CLK_OSC32K_FANOUT>; @@ -119,7 +119,7 @@ non-removable; status = "okay"; - sdio_wifi: sdio_wifi@1 { + sdio_wifi: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts index 4ba533b0340f..59bd0746acf8 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-m1-plus.dts @@ -62,7 +62,7 @@ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ }; @@ -132,7 +132,7 @@ non-removable; status = "okay"; - sdio_wifi: sdio_wifi@1 { + sdio_wifi: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts index 9e1a33f94cad..6d85370e04f1 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts @@ -73,7 +73,7 @@ }; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts index 42cd1131adf3..870649760f70 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-r1.dts @@ -43,7 +43,7 @@ <1300000 0x1>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ clocks = <&rtc CLK_OSC32K_FANOUT>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts index f1f9dbead32a..d2ae47b074bf 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts @@ -105,7 +105,7 @@ }; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */ }; @@ -169,7 +169,7 @@ * Explicitly define the sdio device, so that we can add an ethernet * alias for it (which e.g. makes u-boot set a mac-address). */ - rtl8189: sdio_wifi@1 { + rtl8189: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts index 305b34a321f5..6a4316a52469 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-lite.dts @@ -143,7 +143,7 @@ * Explicitly define the sdio device, so that we can add an ethernet * alias for it (which e.g. makes u-boot set a mac-address). */ - rtl8189ftv: sdio_wifi@1 { + rtl8189ftv: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts index babf4cf1b2f6..8a49b3376dfc 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts @@ -63,7 +63,7 @@ * Explicitly define the sdio device, so that we can add an ethernet * alias for it (which e.g. makes u-boot set a mac-address). */ - rtl8189ftv: sdio_wifi@1 { + rtl8189ftv: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts index 561ea1d2f861..7a6444a10e25 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts @@ -92,7 +92,7 @@ regulator-max-microvolt = <3300000>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */ post-power-on-delay-ms = <200>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi b/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi index 3d9a1524e17e..272584881bb2 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi @@ -62,7 +62,7 @@ }; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; /* * Q8 boards use various PL# pins as wifi-en. On other boards @@ -94,7 +94,7 @@ non-removable; status = "okay"; - sdio_wifi: sdio_wifi@1 { + sdio_wifi: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts index bc394686fedb..f4bf46b35bec 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-r16-bananapi-m2m.dts @@ -88,7 +88,7 @@ regulator-max-microvolt = <5000000>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */ clocks = <&rtc CLK_OSC32K_FANOUT>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts b/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts index 95543a9c2118..75067522ff59 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-r16-parrot.dts @@ -75,7 +75,7 @@ }; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */ }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts index 28197bbcb1d5..cd2351acc32f 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts @@ -100,7 +100,7 @@ enable-active-high; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */ clocks = <&ccu CLK_OUTA>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts b/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts index 0bd1336206b8..15b0b4de626a 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-r40-oka40i-c.dts @@ -62,7 +62,7 @@ regulator-max-microvolt = <5000000>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN clocks = <&ccu CLK_OUTA>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts b/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts index 20966e954eda..e0d4404b5957 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts @@ -51,7 +51,7 @@ startup-delay-us = <200000>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */ post-power-on-delay-ms = <200>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi index e8a04476b776..9e13c2aa8911 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -98,7 +98,7 @@ #size-cells = <1>; ranges; - osc24M: osc24M_clk { + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -106,7 +106,7 @@ clock-output-names = "osc24M"; }; - osc32k: osc32k_clk { + osc32k: osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; diff --git a/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts index 434871040aca..6575ef274453 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-v40-bananapi-m2-berry.dts @@ -94,7 +94,7 @@ enable-active-high; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */ clocks = <&ccu CLK_OUTA>; diff --git a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi index 7d3f3300f431..a1ae0929cec9 100644 --- a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi @@ -196,14 +196,14 @@ * The actual TX clock rate is not controlled by the * gmac_tx clock. */ - mii_phy_tx_clk: mii_phy_tx_clk { + mii_phy_tx_clk: mii-phy-tx-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <25000000>; clock-output-names = "mii_phy_tx"; }; - gmac_int_tx_clk: gmac_int_tx_clk { + gmac_int_tx_clk: gmac-int-tx-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <125000000>; diff --git a/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi index 1d1d127cf38f..873817ddb4ea 100644 --- a/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi +++ b/arch/arm/boot/dts/allwinner/sunxi-bananapi-m2-plus.dtsi @@ -98,7 +98,7 @@ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ clocks = <&rtc CLK_OSC32K_FANOUT>; diff --git a/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi index 60804b0e6c56..be5f5528a118 100644 --- a/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi +++ b/arch/arm/boot/dts/allwinner/sunxi-h3-h5-emlid-neutis.dtsi @@ -18,7 +18,7 @@ stdout-path = "serial0:115200n8"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ post-power-on-delay-ms = <200>; diff --git a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi index ade1cd50e445..7df60515a903 100644 --- a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi @@ -83,7 +83,7 @@ #size-cells = <1>; ranges; - osc24M: osc24M_clk { + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -91,7 +91,7 @@ clock-output-names = "osc24M"; }; - osc32k: osc32k_clk { + osc32k: osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts index 4554abf0c7cd..9aa2de3723b5 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts @@ -98,14 +98,14 @@ /* IPB PMIC */ lm25066@40 { - compatible = "lm25066"; + compatible = "ti,lm25066"; reg = <0x40>; shunt-resistor-micro-ohms = <1000>; }; /* 12VSB PMIC */ lm25066@41 { - compatible = "lm25066"; + compatible = "ti,lm25066"; reg = <0x41>; shunt-resistor-micro-ohms = <10000>; }; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts index 6600f7e9bf5e..e830fec0570f 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts @@ -14,7 +14,7 @@ #define EFUSE(hexaddr, num) \ efuse@##hexaddr { \ - compatible = "lm25066"; \ + compatible = "ti,lm25066"; \ reg = <0x##hexaddr>; \ shunt-resistor-micro-ohms = <675>; \ regulators { \ diff --git a/arch/arm/boot/dts/broadcom/Makefile b/arch/arm/boot/dts/broadcom/Makefile index 7099d9560033..5881bcc95eba 100644 --- a/arch/arm/boot/dts/broadcom/Makefile +++ b/arch/arm/boot/dts/broadcom/Makefile @@ -64,6 +64,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm47081-luxul-xap-1410.dtb \ bcm47081-luxul-xwr-1200.dtb \ bcm47081-tplink-archer-c5-v2.dtb \ + bcm4709-asus-rt-ac3200.dtb \ bcm4709-asus-rt-ac87u.dtb \ bcm4709-buffalo-wxr-1900dhp.dtb \ bcm4709-linksys-ea9200.dtb \ @@ -71,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4709-netgear-r8000.dtb \ bcm4709-tplink-archer-c9-v1.dtb \ bcm47094-asus-rt-ac3100.dtb \ + bcm47094-asus-rt-ac5300.dtb \ bcm47094-asus-rt-ac88u.dtb \ bcm47094-dlink-dir-885l.dtb \ bcm47094-dlink-dir-890l.dtb \ diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts index d5f8823230db..353bb50ce542 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts @@ -5,6 +5,7 @@ #include "bcm283x-rpi-led-deprecated.dtsi" #include "bcm283x-rpi-usb-peripheral.dtsi" #include "bcm283x-rpi-wifi-bt.dtsi" +#include <dt-bindings/leds/common.h> / { compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; @@ -15,6 +16,13 @@ stdout-path = "serial1:115200n8"; }; + cam1_reg: regulator-cam1 { + compatible = "regulator-fixed"; + regulator-name = "cam1-reg"; + enable-active-high; + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; + }; + sd_io_1v8_reg: regulator-sd-io-1v8 { compatible = "regulator-gpio"; regulator-name = "vdd-sd-io"; @@ -197,6 +205,27 @@ phy1: ethernet-phy@1 { /* No PHY interrupt */ reg = <0x1>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + /* LED1 */ + led@0 { + reg = <0>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + /* LED2 */ + led@1 { + reg = <1>; + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts index 5a2869a18bd5..ca9be91b4f36 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts @@ -30,6 +30,7 @@ &genet_mdio { clock-frequency = <1950000>; + /delete-node/ leds; }; &led_pwr { diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts index d7ba02f586d3..6bc77dd48c0d 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; +#include <dt-bindings/leds/common.h> #include "bcm2711-rpi-cm4.dtsi" #include "bcm283x-rpi-led-deprecated.dtsi" #include "bcm283x-rpi-usb-host.dtsi" @@ -101,6 +102,38 @@ status = "okay"; }; +&i2c0_1 { + rtc@51 { + /* Attention: An alarm resets the machine */ + compatible = "nxp,pcf85063a"; + reg = <0x51>; + quartz-load-femtofarads = <7000>; + }; +}; + +&phy1 { + leds { + #address-cells = <1>; + #size-cells = <0>; + + /* LED2 */ + led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + /* LED3 */ + led@2 { + reg = <2>; + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; +}; + &led_act { gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi index d233a191c139..6bf4241fe3b7 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi @@ -17,14 +17,33 @@ pcie0 = &pcie0; blconfig = &blconfig; }; -}; -&firmware { - firmware_clocks: clocks { - compatible = "raspberrypi,firmware-clocks"; - #clock-cells = <1>; + i2c0mux: i2c-mux0 { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&i2c0>; + + pinctrl-names = "i2c0", "i2c0-vc"; + pinctrl-0 = <&i2c0_gpio0>; + pinctrl-1 = <&i2c0_gpio44>; + + i2c0_0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c0_1: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; }; +}; +&firmware { expgpio: gpio { compatible = "raspberrypi,firmware-gpio"; gpio-controller; @@ -54,6 +73,11 @@ clocks = <&firmware_clocks 4>; }; +&i2c0 { + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; +}; + &rmem { /* * RPi4's co-processor will copy the board's bootloader configuration diff --git a/arch/arm/boot/dts/broadcom/bcm2711.dtsi b/arch/arm/boot/dts/broadcom/bcm2711.dtsi index 22c7f1561344..e4e42af21ef3 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi @@ -432,8 +432,8 @@ }; }; - arm-pmu { - compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; + pmu { + compatible = "arm,cortex-a72-pmu"; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, @@ -1114,6 +1114,14 @@ #address-cells = <2>; }; +&csi0 { + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; +}; + +&csi1 { + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; +}; + &cma { /* * arm64 reserves the CMA by default somewhere in ZONE_DMA32, diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi b/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi index 4e7b4a592da7..8b3c21d9f333 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi @@ -7,13 +7,6 @@ #include <dt-bindings/power/raspberrypi-power.h> -&firmware { - firmware_clocks: clocks { - compatible = "raspberrypi,firmware-clocks"; - #clock-cells = <1>; - }; -}; - &hdmi { clocks = <&firmware_clocks 9>, <&firmware_clocks 13>; diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi index f0acc9390f31..e9bf41b9f5c1 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi @@ -4,11 +4,12 @@ soc { firmware: firmware { compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - mboxes = <&mailbox>; - dma-ranges; + + firmware_clocks: clocks { + compatible = "raspberrypi,firmware-clocks"; + #clock-cells = <1>; + }; }; power: power { @@ -25,6 +26,20 @@ }; }; +&csi0 { + clocks = <&clocks BCM2835_CLOCK_CAM0>, + <&firmware_clocks 4>; + clock-names = "lp", "vpu"; + power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; +}; + +&csi1 { + clocks = <&clocks BCM2835_CLOCK_CAM1>, + <&firmware_clocks 4>; + clock-names = "lp", "vpu"; + power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; +}; + &gpio { gpioout: gpioout { brcm,pins = <6>; diff --git a/arch/arm/boot/dts/broadcom/bcm283x.dtsi b/arch/arm/boot/dts/broadcom/bcm283x.dtsi index 2ca8a2505a4d..69b0919f1324 100644 --- a/arch/arm/boot/dts/broadcom/bcm283x.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm283x.dtsi @@ -454,6 +454,30 @@ status = "disabled"; }; + csi0: csi@7e800000 { + compatible = "brcm,bcm2835-unicam"; + reg = <0x7e800000 0x800>, + <0x7e802000 0x4>; + reg-names = "unicam", "cmi"; + interrupts = <2 6>; + brcm,num-data-lanes = <2>; + status = "disabled"; + port { + }; + }; + + csi1: csi@7e801000 { + compatible = "brcm,bcm2835-unicam"; + reg = <0x7e801000 0x800>, + <0x7e802004 0x4>; + reg-names = "unicam", "cmi"; + interrupts = <2 7>; + brcm,num-data-lanes = <4>; + status = "disabled"; + port { + }; + }; + i2c1: i2c@7e804000 { compatible = "brcm,bcm2835-i2c"; reg = <0x7e804000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts new file mode 100644 index 000000000000..53cb0c58f6d0 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Author: Tom Brautaset <tbrautaset@gmail.com> + */ + +/dts-v1/; + +#include "bcm4709.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" + +#include <dt-bindings/leds/common.h> + +/ { + compatible = "asus,rt-ac3200", "brcm,bcm4709", "brcm,bcm4708"; + model = "ASUS RT-AC3200"; + + memory@0 { + reg = <0x00000000 0x08000000>, + <0x88000000 0x08000000>; + device_type = "memory"; + }; + + nvram@1c080000 { + compatible = "brcm,nvram"; + reg = <0x1c080000 0x00180000>; + + et0macaddr: et0macaddr { + #nvmem-cell-cells = <1>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + }; + + button-wifi { + label = "Wi-Fi"; + linux,code = <KEY_RFKILL>; + gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; + }; + + button-wps { + label = "WPS"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-power { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_POWER; + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led-wan-red { + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_WAN; + gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; + }; + + led-wps { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_WPS; + gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&et0macaddr 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + nvmem-cells = <&et0macaddr 1>; + nvmem-cell-names = "mac-address"; +}; + +&gmac2 { + nvmem-cells = <&et0macaddr 2>; + nvmem-cell-names = "mac-address"; +}; + +&nandcs { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x00000000 0x00080000>; + label = "boot"; + read-only; + }; + + partition@80000 { + reg = <0x00080000 0x00180000>; + label = "nvram"; + }; + + partition@200000 { + compatible = "brcm,trx"; + reg = <0x00200000 0x07e00000>; + label = "firmware"; + }; + }; +}; + +&srab { + status = "okay"; + + ports { + port@0 { + label = "wan"; + }; + + port@1 { + label = "lan1"; + }; + + port@2 { + label = "lan2"; + }; + + port@3 { + label = "lan3"; + }; + + port@4 { + label = "lan4"; + }; + }; +}; + +&usb2 { + vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; +}; + +&usb3_phy { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts index 5f089307cd8c..1655ac95769c 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts @@ -13,11 +13,22 @@ nvram@1c080000 { et0macaddr: et0macaddr { + #nvmem-cell-cells = <1>; }; }; }; &gmac0 { - nvmem-cells = <&et0macaddr>; + nvmem-cells = <&et0macaddr 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + nvmem-cells = <&et0macaddr 1>; + nvmem-cell-names = "mac-address"; +}; + +&gmac2 { + nvmem-cells = <&et0macaddr 2>; nvmem-cell-names = "mac-address"; }; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi index 09cefce27fb1..2cfaaabc7a6a 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi @@ -6,15 +6,13 @@ #include "bcm47094.dtsi" #include "bcm5301x-nand-cs0-bch8.dtsi" -/ { - chosen { - bootargs = "earlycon"; - }; +#include <dt-bindings/leds/common.h> +/ { memory@0 { - device_type = "memory"; reg = <0x00000000 0x08000000>, <0x88000000 0x18000000>; + device_type = "memory"; }; nvram@1c080000 { @@ -22,76 +20,108 @@ reg = <0x1c080000 0x00180000>; }; - leds { - compatible = "gpio-leds"; + gpio-keys { + compatible = "gpio-keys"; - led-power { - label = "white:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-on"; + button-led { + label = "Backlight"; + linux,code = <KEY_BRIGHTNESS_ZERO>; + gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; }; - led-wan-red { - label = "red:wan"; - gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; + button-reset { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + }; + + button-wifi { + label = "Wi-Fi"; + linux,code = <KEY_RFKILL>; + gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; }; + button-wps { + label = "WPS"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + led-lan { - label = "white:lan"; + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_LAN; gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>; }; + led-power { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_POWER; + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + led-usb2 { - label = "white:usb2"; + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_USB; + function-enumerator = <1>; gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; trigger-sources = <&ehci_port2>; linux,default-trigger = "usbport"; }; led-usb3 { - label = "white:usb3"; + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_USB; + function-enumerator = <2>; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; trigger-sources = <&ehci_port1>, <&xhci_port1>; linux,default-trigger = "usbport"; }; + led-wan-red { + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_WAN; + gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; + }; + led-wps { - label = "white:wps"; + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_WPS; gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; }; }; +}; - gpio-keys { - compatible = "gpio-keys"; - - button-wps { - label = "WPS"; - linux,code = <KEY_WPS_BUTTON>; - gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; - }; +&nandcs { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - button-reset { - label = "Reset"; - linux,code = <KEY_RESTART>; - gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + partition@0 { + reg = <0x00000000 0x00080000>; + label = "boot"; + read-only; }; - button-wifi { - label = "Wi-Fi"; - linux,code = <KEY_RFKILL>; - gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; + partition@80000 { + reg = <0x00080000 0x00180000>; + label = "nvram"; }; - button-led { - label = "Backlight"; - linux,code = <KEY_BRIGHTNESS_ZERO>; - gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; + partition@200000 { + compatible = "brcm,trx"; + reg = <0x00200000 0x07e00000>; + label = "firmware"; }; }; }; &srab { - compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab"; status = "okay"; ports { @@ -136,28 +166,3 @@ &usb3_phy { status = "okay"; }; - -&nandcs { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "boot"; - reg = <0x00000000 0x00080000>; - read-only; - }; - - partition@80000 { - label = "nvram"; - reg = <0x00080000 0x00180000>; - }; - - partition@200000 { - label = "firmware"; - reg = <0x00200000 0x07e00000>; - compatible = "brcm,trx"; - }; - }; -}; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts new file mode 100644 index 000000000000..6c666dc7ad23 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Author: Tom Brautaset <tbrautaset@gmail.com> + */ + +/dts-v1/; + +#include "bcm47094.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" + +#include <dt-bindings/leds/common.h> + +/ { + compatible = "asus,rt-ac5300", "brcm,bcm47094", "brcm,bcm4708"; + model = "ASUS RT-AC5300"; + + memory@0 { + reg = <0x00000000 0x08000000>, + <0x88000000 0x18000000>; + device_type = "memory"; + }; + + nvram@1c080000 { + compatible = "brcm,nvram"; + reg = <0x1c080000 0x00180000>; + + et1macaddr: et1macaddr { + #nvmem-cell-cells = <1>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + }; + + button-wifi { + label = "Wi-Fi"; + linux,code = <KEY_RFKILL>; + gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; + }; + + button-wps { + label = "WPS"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-lan { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_LAN; + gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>; + }; + + led-power { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_POWER; + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led-wan-red { + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_WAN; + gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; + }; + + led-wps { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_WPS; + gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&et1macaddr 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + nvmem-cells = <&et1macaddr 1>; + nvmem-cell-names = "mac-address"; +}; + +&gmac2 { + nvmem-cells = <&et1macaddr 2>; + nvmem-cell-names = "mac-address"; +}; + +&nandcs { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x00000000 0x00080000>; + label = "boot"; + read-only; + }; + + partition@80000 { + reg = <0x00080000 0x00180000>; + label = "nvram"; + }; + + partition@200000 { + compatible = "brcm,trx"; + reg = <0x00200000 0x07e00000>; + label = "firmware"; + }; + }; +}; + +&srab { + status = "okay"; + + ports { + port@0 { + label = "lan4"; + }; + + port@1 { + label = "lan3"; + }; + + port@2 { + label = "lan2"; + }; + + port@3 { + label = "lan1"; + }; + + port@4 { + label = "wan"; + }; + }; +}; + +&usb2 { + vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; +}; + +&usb3_phy { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts index fd344b55087e..a197f447fd97 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts @@ -13,18 +13,40 @@ nvram@1c080000 { et1macaddr: et1macaddr { + #nvmem-cell-cells = <1>; }; }; switch { compatible = "realtek,rtl8365mb"; - /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */ mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; realtek,disable-leds; dsa,member = <1 0>; + mdio { + compatible = "realtek,smi-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; + }; + ports { #address-cells = <1>; #size-cells = <0>; @@ -68,29 +90,21 @@ }; }; }; + }; +}; - mdio { - compatible = "realtek,smi-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@0 { - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - reg = <1>; - }; +&gmac0 { + status = "disabled"; +}; - ethphy2: ethernet-phy@2 { - reg = <2>; - }; +&gmac1 { + nvmem-cells = <&et1macaddr 0>; + nvmem-cell-names = "mac-address"; +}; - ethphy3: ethernet-phy@3 { - reg = <3>; - }; - }; - }; +&gmac2 { + nvmem-cells = <&et1macaddr 1>; + nvmem-cell-names = "mac-address"; }; &srab { @@ -111,12 +125,3 @@ }; }; }; - -&gmac0 { - status = "disabled"; -}; - -&gmac1 { - nvmem-cells = <&et1macaddr>; - nvmem-cell-names = "mac-address"; -}; diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi index 8c1d5c9fa483..2ff7be8f1382 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi @@ -445,9 +445,9 @@ tegra_ac97: ac97@70002000 { status = "okay"; - nvidia,codec-reset-gpio = + nvidia,codec-reset-gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; - nvidia,codec-sync-gpio = + nvidia,codec-sync-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-paz00.dts b/arch/arm/boot/dts/nvidia/tegra20-paz00.dts index afb922bd79a7..1408e1e00759 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-paz00.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-paz00.dts @@ -533,6 +533,49 @@ 0x00000000 0x00000000 0x00000000 0x00000000>; }; }; + + emc-tables@1 { + nvidia,ram-code = <0x1>; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + emc-table@166500 { + reg = <166500>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <166500>; + nvidia,emc-registers = <0x0000000a 0x00000016 + 0x00000008 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x000004df + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000a 0x000000c8 + 0x00000003 0x00000006 0x00000004 0x00000008 + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe03b0323 + 0x007fe010 0x00001414 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + + emc-table@333000 { + reg = <333000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <333000>; + nvidia,emc-registers = <0x00000018 0x00000033 + 0x00000012 0x00000004 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000006 0x00000006 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x00000bff + 0x00000000 0x00000003 0x00000003 0x00000006 + 0x00000006 0x00000001 0x00000011 0x000000c8 + 0x00000003 0x0000000e 0x00000007 0x00000008 + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xf0440303 + 0x007fe010 0x00001414 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + }; }; usb@c5000000 { diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index 4052cad859fa..231c0d73a53e 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -349,12 +349,15 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-phytec-segin-lc-rdk-nand.dtb \ imx6ull-phytec-tauri-emmc.dtb \ imx6ull-phytec-tauri-nand.dtb \ + imx6ull-seeed-npi-dev-board-emmc.dtb \ + imx6ull-seeed-npi-dev-board-nand.dtb \ imx6ull-tarragon-master.dtb \ imx6ull-tarragon-micro.dtb \ imx6ull-tarragon-slave.dtb \ imx6ull-tarragon-slavext.dtb \ imx6ull-tqma6ull2-mba6ulx.dtb \ imx6ull-tqma6ull2l-mba6ulx.dtb \ + imx6ull-uti260b.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-bsh-smm-m2.dtb dtb-$(CONFIG_SOC_IMX7D) += \ diff --git a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi index dd03e3860f97..13756d39fb7b 100644 --- a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi +++ b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi @@ -127,7 +127,7 @@ compatible = "ricoh,rc5t619"; reg = <0x32>; interrupt-parent = <&gpio5>; - interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; system-power-controller; regulators { diff --git a/arch/arm/boot/dts/nxp/imx/e70k02.dtsi b/arch/arm/boot/dts/nxp/imx/e70k02.dtsi index 4e1bf080eaca..dcc3c9d488a8 100644 --- a/arch/arm/boot/dts/nxp/imx/e70k02.dtsi +++ b/arch/arm/boot/dts/nxp/imx/e70k02.dtsi @@ -145,7 +145,7 @@ compatible = "ricoh,rc5t619"; reg = <0x32>; interrupt-parent = <&gpio4>; - interrupts = <19 IRQ_TYPE_EDGE_FALLING>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; system-power-controller; regulators { diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi index abc9233c5a1b..31b3fc972abb 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi @@ -15,6 +15,22 @@ device_type = "memory"; reg = <0xa0000000 0x08000000>; /* 128MB */ }; + + usbotgphy: usbotgphy { + compatible = "usb-nop-xceiv"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotgphy>; + reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; + #phy-cells = <0>; + }; + + usbh2phy: usbh2phy { + compatible = "usb-nop-xceiv"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh2phy>; + reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; + #phy-cells = <0>; + }; }; &cspi1 { @@ -84,6 +100,52 @@ MX27_PAD_NFWE_B__NFWE_B 0x0 >; }; + + pinctrl_usbotgphy: usbotgphygrp { + fsl,pins = < + MX27_PAD_USBH1_RCV__GPIO2_25 0x1 /* reset gpio */ + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 + MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0 + MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0 + MX27_PAD_USBOTG_STP__USBOTG_STP 0x0 + MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0 + MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0 + MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0 + MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0 + MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0 + MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0 + MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0 + MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0 + >; + }; + + pinctrl_usbh2phy: usbh2phygrp { + fsl,pins = < + MX27_PAD_USBH1_SUSP__GPIO2_22 0x0 /* reset gpio */ + >; + }; + + pinctrl_usbh2: usbh2grp { + fsl,pins = < + MX27_PAD_USBH2_CLK__USBH2_CLK 0x0 + MX27_PAD_USBH2_DIR__USBH2_DIR 0x0 + MX27_PAD_USBH2_NXT__USBH2_NXT 0x0 + MX27_PAD_USBH2_STP__USBH2_STP 0x0 + MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0 + MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0 + MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0 + MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0 + MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0 + MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0 + MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0 + MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0 + >; + }; }; }; @@ -95,3 +157,19 @@ nand-on-flash-bbt; status = "okay"; }; + +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + phy_type = "ulpi"; + phys = <&usbotgphy>; + status = "okay"; +}; + +&usbh2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh2>; + phy_type = "ulpi"; + phys = <&usbh2phy>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts index f7408722d68a..2bd0761c7e90 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts @@ -45,7 +45,7 @@ backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 78770>; + pwms = <&pwm1 0 78770 0>; brightness-levels = <0 150 200 255>; default-brightness-level = <1>; power-supply = <&backlight_reg>; @@ -113,7 +113,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm_backlight>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts b/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts index 0e7f071fd10e..f6f116366643 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts @@ -13,7 +13,7 @@ backlight_lcd: backlight { compatible = "pwm-backlight"; - pwms = <&pwm2 0 50000>; + pwms = <&pwm2 0 50000 0>; power-supply = <®_backlight>; brightness-levels = <0 24 28 32 36 40 44 48 52 56 diff --git a/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi index 4508f34139a0..ae5f87b8612d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi @@ -13,7 +13,7 @@ compatible = "pwm-beeper"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_buzzer>; - pwms = <&pwm1 0 500000>; + pwms = <&pwm1 0 500000 0>; }; gpio-buttons { @@ -162,14 +162,6 @@ >; }; -&pwm1 { - #pwm-cells = <2>; -}; - -&pwm2 { - #pwm-cells = <2>; -}; - &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts index c323b4dbe9f0..1353d985969c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts @@ -41,7 +41,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 3000>; + pwms = <&pwm1 0 3000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; power-supply = <®_backlight>; @@ -313,7 +313,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts b/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts index 6a37616cef1c..2117de872703 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts @@ -17,7 +17,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm2 0 50000>; + pwms = <&pwm2 0 50000 0>; brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; default-brightness-level = <10>; enable-gpios = <&gpio7 7 0>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts b/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts index 70c4a4852256..e939acc1c88b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts @@ -167,7 +167,7 @@ pwm_bl: backlight { compatible = "pwm-backlight"; - pwms = <&pwm2 0 50000>; + pwms = <&pwm2 0 50000 0>; brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35 38 40 43 45 48 51 53 56 58 61 63 66 68 71 73 76 79 81 84 86 89 91 94 96 99 102 104 @@ -187,7 +187,7 @@ led-1 { label = "alarm-brightness"; - pwms = <&pwm1 0 100000>; + pwms = <&pwm1 0 100000 0>; max-brightness = <255>; }; }; @@ -628,14 +628,12 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm2 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi index 294811bfc8d2..b2d7271d1d24 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi @@ -202,14 +202,6 @@ }; }; -&pwm1 { - #pwm-cells = <2>; -}; - -&pwm2 { - #pwm-cells = <2>; -}; - &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts index cc861a43eb58..a5ac79346854 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts @@ -14,7 +14,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; enable-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; @@ -79,6 +79,5 @@ }; &pwm1 { - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts index b6cb78870cd5..5a25bdbbeb68 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts @@ -49,7 +49,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm3 0 3000>; + pwms = <&pwm3 0 3000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; pinctrl-names = "default"; @@ -69,6 +69,5 @@ }; &pwm3 { - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts index 028951955bde..72ee236d2f5e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts @@ -21,7 +21,7 @@ backlight_lcd: backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm3 0 25000>; /* 25000ns -> 40kHz */ + pwms = <&pwm3 0 25000 0>; /* 25000ns -> 40kHz */ brightness-levels = <0 4 8 16 32 64 128 160 192 224 255>; default-brightness-level = <7>; }; @@ -303,7 +303,6 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi index f266f1b7e0cf..09d9ca0cb332 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi @@ -55,7 +55,7 @@ compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_display>; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 @@ -349,7 +349,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts b/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts index 02648806c275..d3f14b4d3b51 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts @@ -36,7 +36,7 @@ backlight_lvds: backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm1 0 200000>; + pwms = <&pwm1 0 200000 0>; brightness-levels = <0 61 499 1706 4079 8022 13938 22237 33328 47623 65535>; num-interpolated-steps = <10>; default-brightness-level = <60>; @@ -117,14 +117,14 @@ color = <LED_COLOR_ID_RED>; max-brightness = <248>; default-state = "off"; - pwms = <&pwm2 0 500000>; + pwms = <&pwm2 0 500000 0>; }; led_white: led-1 { color = <LED_COLOR_ID_WHITE>; max-brightness = <248>; default-state = "off"; - pwms = <&pwm3 0 500000>; + pwms = <&pwm3 0 500000 0>; linux,default-trigger = "heartbeat"; }; }; @@ -484,28 +484,24 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm2 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi index 091903f53a56..c425d427663d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi @@ -15,7 +15,7 @@ / { backlight_lcd: backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 255>; num-interpolated-steps = <255>; default-brightness-level = <250>; @@ -23,7 +23,7 @@ beeper { compatible = "pwm-beeper"; - pwms = <&pwm2 0 500000>; + pwms = <&pwm2 0 500000 0>; }; lcd_display: display { @@ -378,14 +378,12 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm2 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts b/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts index a7d5a68110fc..d392b5bd2eea 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts @@ -67,7 +67,7 @@ backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 10000000>; + pwms = <&pwm1 0 10000000 0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_backlight_novena>; power-supply = <®_lvds_lcd>; @@ -465,7 +465,6 @@ }; &pwm1 { - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts index 46c6b96d8073..56b77cc0af2b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts @@ -124,7 +124,7 @@ backlight_lvds: backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm1 0 50000>; + pwms = <&pwm1 0 50000 0>; brightness-levels = < 0 /*1 2 3 4 5 6*/ 7 8 9 10 11 12 13 14 15 16 17 18 19 @@ -571,7 +571,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts b/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts index 3508a2cd928a..a7d5693c5ab7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts @@ -22,7 +22,7 @@ compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_backlight>; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 16 64 255>; num-interpolated-steps = <16>; default-brightness-level = <1>; @@ -292,7 +292,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts b/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts index 2290c1237634..0225a621ec7a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts @@ -18,7 +18,7 @@ backlight_lvds: backlight { compatible = "pwm-backlight"; - pwms = <&pwm2 0 50000>; + pwms = <&pwm2 0 50000 0>; brightness-levels = <0 4 8 16 32 64 128 248>; default-brightness-level = <7>; status = "okay"; @@ -203,7 +203,6 @@ }; &pwm2 { - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi index 338d292553ad..3a46ade3b6bd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi @@ -13,7 +13,7 @@ backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm3 0 191000>; + pwms = <&pwm3 0 191000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <0>; power-supply = <®_5v>; @@ -212,7 +212,6 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi index db1bc511e71f..758eaf9d93d2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi @@ -46,7 +46,7 @@ / { backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>; @@ -346,7 +346,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi index 1e530d892b76..761566ae3cf5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi @@ -64,7 +64,7 @@ active-low; label = "imx6:red:front"; max-brightness = <248>; - pwms = <&pwm1 0 50000>; + pwms = <&pwm1 0 50000 0>; }; }; @@ -233,7 +233,6 @@ }; &pwm1 { - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi index 42b2ba23aefc..a308a3584b62 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi @@ -66,7 +66,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lvds_bl>; enable-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; - pwms = <&pwm1 0 50000>; + pwms = <&pwm1 0 50000 0>; brightness-levels = < 0 4 8 16 32 64 80 96 112 128 144 160 176 250 @@ -78,7 +78,7 @@ pwm_fan: pwm-fan { compatible = "pwm-fan"; #cooling-cells = <2>; - pwms = <&pwm4 0 50000>; + pwms = <&pwm4 0 50000 0>; cooling-levels = <0 64 127 191 255>; status = "disabled"; }; @@ -145,7 +145,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgb_bl>; enable-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; - pwms = <&pwm3 0 5000000>; + pwms = <&pwm3 0 5000000 0>; brightness-levels = < 250 176 160 144 128 112 96 80 64 48 32 16 8 1 @@ -736,17 +736,14 @@ }; &pwm1 { - #pwm-cells = <2>; status = "okay"; }; &pwm3 { - #pwm-cells = <2>; status = "okay"; }; &pwm4 { - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi index 535679c27d6f..48ffb3ee01bd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi @@ -25,7 +25,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; }; @@ -520,7 +520,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi index 3e1c572af582..1eae438fbdae 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi @@ -25,7 +25,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; }; @@ -517,7 +517,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi index 0ffa0357a6fa..c2ec8572c8a5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi @@ -26,7 +26,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; }; @@ -570,7 +570,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default", "state_dio"; pinctrl-0 = <&pinctrl_pwm4_backlight>; pinctrl-1 = <&pinctrl_pwm4_dio>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi index 46cf4080fec3..7cee983da669 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi @@ -66,7 +66,7 @@ backlight-display { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 @@ -619,7 +619,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi index a74cde050158..fbc704c064b6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi @@ -56,7 +56,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 @@ -502,7 +502,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi index 1e723807ab4c..070506279186 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi @@ -70,7 +70,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; }; @@ -586,7 +586,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi index efe11524b885..9975b6ee433d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi @@ -20,7 +20,7 @@ backlight_lvds: backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm3 0 100000>; + pwms = <&pwm3 0 100000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; }; @@ -245,7 +245,6 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi index 4d2abcd44eff..60aa1e947f62 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi @@ -298,6 +298,7 @@ reg = <1>; #address-cells = <1>; #size-cells = <0>; + vdd-supply = <®_mba6_3p3v>; ethernet@1 { compatible = "usb424,9e00"; @@ -441,8 +442,6 @@ pinctrl_hog: hoggrp { fsl,pins = < - MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099 - MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x0001b099 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi index f2542d725ce7..a30cf0d06206 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi @@ -108,7 +108,7 @@ backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -117,7 +117,7 @@ backlight_lvds0: backlight-lvds0 { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -499,7 +499,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; @@ -512,7 +511,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi index 32a110a35b02..33174febf410 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi @@ -183,7 +183,7 @@ backlight_lcd: backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -192,7 +192,7 @@ backlight_lvds0: backlight-lvds0 { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -201,7 +201,7 @@ backlight_lvds1: backlight-lvds1 { compatible = "pwm-backlight"; - pwms = <&pwm2 0 5000000>; + pwms = <&pwm2 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -735,14 +735,12 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm2 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; @@ -755,7 +753,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi index 414196b75991..8e64314fa8b2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi @@ -17,7 +17,7 @@ backlight_lcd: backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -26,7 +26,7 @@ backlight_lvds0: backlight-lvds0 { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -641,7 +641,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; @@ -654,7 +653,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi index f278b14911ce..121177273dd0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi @@ -134,7 +134,7 @@ backlight_lcd: backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -143,7 +143,7 @@ backlight_lvds: backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -596,7 +596,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; @@ -609,7 +608,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi index 1ca4d219609f..0b4c09b09c03 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi @@ -15,7 +15,7 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_backlight>; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; status = "okay"; }; @@ -224,7 +224,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi index 68e97180d33e..6656e2e762a1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi @@ -144,8 +144,8 @@ }; sound-spdif { - compatible = "fsl,imx-audio-spdif", - "fsl,imx-sabreauto-spdif"; + compatible = "fsl,imx-sabreauto-spdif", + "fsl,imx-audio-spdif"; model = "imx-spdif"; spdif-controller = <&spdif>; spdif-in; @@ -153,7 +153,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm3 0 5000000>; + pwms = <&pwm3 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; status = "okay"; @@ -802,7 +802,6 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi index 84c8a9531e18..9c502bf77d0b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi @@ -99,7 +99,7 @@ #clock-cells = <0>; clock-frequency = <22000000>; clock-output-names = "mipi_pwm3"; - pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */ + pwms = <&pwm3 0 45 0>; /* 1 / 45 ns = 22 MHz */ status = "okay"; }; @@ -162,7 +162,7 @@ backlight_lcd: backlight-lcd { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -171,7 +171,7 @@ backlight_lvds: backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_3p3v>; @@ -654,21 +654,18 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi index 4fe58764b929..8f4f5fba68cc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi @@ -119,7 +119,7 @@ backlight_lvds: backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; status = "okay"; @@ -755,7 +755,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi index 02e6d36e85fa..6823a639ed2f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi @@ -83,7 +83,7 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <4>; power-supply = <®_3p3v>; - pwms = <&pwm1 0 10000>; + pwms = <&pwm1 0 10000 0>; }; reg_3p3v: regulator-3p3v { @@ -140,7 +140,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi index d59d5d0e1d19..6ab71a729fd8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi @@ -282,7 +282,6 @@ &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; - #pwm-cells = <2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi index 647ba5e623dd..14272b42f9a1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi @@ -59,16 +59,6 @@ }; }; - reg_usb_h1_vbus: regulator-usb-h1-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */ - gpio = <&gpio7 12 0>; - }; - reg_panel: regulator-panel { compatible = "regulator-fixed"; regulator-name = "lcd_panel"; @@ -285,9 +275,18 @@ &usbh1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbh>; - vbus-supply = <®_usb_h1_vbus>; - clocks = <&clks IMX6QDL_CLK_CKO>; - status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + usb-port@1 { + compatible = "usb424,2514"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clks IMX6QDL_CLK_CKO>; + reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; + }; }; &usbotg { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index 8431b8a994f4..d2200c9db25a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -397,11 +397,10 @@ reg = <0x02024000 0x4000>; interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_ESAI_IPG>, - <&clks IMX6QDL_CLK_ESAI_MEM>, <&clks IMX6QDL_CLK_ESAI_EXTAL>, <&clks IMX6QDL_CLK_ESAI_IPG>, <&clks IMX6QDL_CLK_SPBA>; - clock-names = "core", "mem", "extal", "fsys", "spba"; + clock-names = "core", "extal", "fsys", "spba"; dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; dma-names = "rx", "tx"; status = "disabled"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts index 239bc6dfc584..31eee0419af7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts @@ -23,7 +23,7 @@ backlight_display: backlight_display { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; @@ -584,10 +584,8 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; - status = "okay"; }; ®_vdd1p1 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts index 5636fb3661e8..03d6965f0149 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts @@ -138,7 +138,7 @@ pinctrl-0 = <&pinctrl_zforce>; reg = <0x50>; interrupt-parent = <&gpio5>; - interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; vdd-supply = <&ldo1_reg>; reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; touchscreen-size-x = <1072>; @@ -163,7 +163,7 @@ pinctrl-0 = <&pinctrl_ricoh_gpio>; reg = <0x32>; interrupt-parent = <&gpio5>; - interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; system-power-controller; regulators { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts index e3e9b0ec4f73..febc2dd9967d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts @@ -26,7 +26,7 @@ backlight_display: backlight-display { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; status = "okay"; @@ -314,10 +314,8 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; - status = "okay"; }; &snvs_poweroff { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi index 3659fd5ecfa6..ddeb5b37fb78 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi @@ -683,7 +683,6 @@ clocks = <&clks IMX6SLL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts index cd9cbc9ccc9e..1c1515a854c8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts @@ -18,7 +18,7 @@ backlight-lvds { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; power-supply = <®_3p3v>; @@ -83,7 +83,7 @@ sound { compatible = "fsl,imx-audio-sgtl5000"; model = "imx6sx-nitrogen6sx-sgtl5000"; - cpu-dai = <&ssi1>; + ssi-controller = <&ssi1>; audio-codec = <&codec>; audio-routing = "MIC_IN", "Mic Jack", @@ -229,10 +229,8 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; - status = "okay"; }; &ssi1 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi index c6e85e4a0883..7d4170c27732 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi @@ -23,7 +23,7 @@ backlight_display: backlight-display { compatible = "pwm-backlight"; - pwms = <&pwm3 0 5000000>; + pwms = <&pwm3 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; @@ -184,8 +184,8 @@ }; sound-spdif { - compatible = "fsl,imx-audio-spdif", - "fsl,imx6sx-sdb-spdif"; + compatible = "fsl,imx6sx-sdb-spdif", + "fsl,imx-audio-spdif"; model = "imx-spdif"; spdif-controller = <&spdif>; spdif-out; @@ -295,10 +295,8 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; - status = "okay"; }; &snvs_poweroff { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts index bfcd8f7d86dd..f999eb244373 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts @@ -46,19 +46,19 @@ led-1 { label = "red"; max-brightness = <255>; - pwms = <&pwm6 0 50000>; + pwms = <&pwm6 0 50000 0>; }; led-2 { label = "green"; max-brightness = <255>; - pwms = <&pwm2 0 50000>; + pwms = <&pwm2 0 50000 0>; }; led-3 { label = "blue"; max-brightness = <255>; - pwms = <&pwm1 0 50000>; + pwms = <&pwm1 0 50000 0>; }; }; }; @@ -505,24 +505,18 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; - status = "okay"; }; &pwm2 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; - status = "okay"; }; &pwm6 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm6>; - status = "okay"; }; ®_arm { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index 0de359d62a47..b386448486df 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -339,15 +339,14 @@ }; esai: esai@2024000 { - compatible = "fsl,imx6sx-esai", "fsl,imx35-esai"; + compatible = "fsl,imx35-esai"; reg = <0x02024000 0x4000>; interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_ESAI_IPG>, - <&clks IMX6SX_CLK_ESAI_MEM>, <&clks IMX6SX_CLK_ESAI_EXTAL>, <&clks IMX6SX_CLK_ESAI_IPG>, <&clks IMX6SX_CLK_SPBA>; - clock-names = "core", "mem", "extal", + clock-names = "core", "extal", "fsys", "spba"; dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; @@ -929,7 +928,6 @@ clocks = <&clks IMX6SX_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; @@ -957,7 +955,6 @@ fsl,usbphy = <&usbphynop1>; fsl,usbmisc = <&usbmisc 2>; phy_type = "hsic"; - fsl,anatop = <&anatop>; dr_mode = "host"; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi index f10f0525490b..9cfb99ac9e9d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -16,7 +16,7 @@ backlight_display: backlight-display { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; status = "okay"; @@ -277,7 +277,6 @@ }; &pwm1 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts index 1762bc47e18d..ed61ae8524fa 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts @@ -18,7 +18,7 @@ lcd_backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm5 0 50000>; + pwms = <&pwm5 0 50000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; status = "okay"; @@ -168,7 +168,6 @@ }; &pwm5 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm5>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts index 2ca18f3dad0a..cdbb8c435cd6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -21,7 +21,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm8 0 100000>; + pwms = <&pwm8 0 100000 0>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 @@ -194,7 +194,6 @@ }; &pwm8 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm8>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi index af337f18a266..be3cacb4fa7a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi @@ -9,7 +9,7 @@ backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm3 0 191000>; + pwms = <&pwm3 0 191000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; power-supply = <®_5v>; @@ -143,7 +143,6 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi index 14fc4828ba4e..ee86c36205f9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi @@ -20,7 +20,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm8 0 100000>; + pwms = <&pwm8 0 100000 0>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 @@ -187,7 +187,6 @@ }; &pwm8 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm8>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts index 0c643706a158..4e8191a65211 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-43.dts @@ -14,7 +14,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm7 0 5000000>; + pwms = <&pwm7 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; status = "okay"; @@ -41,7 +41,6 @@ }; &pwm7 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm7>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi index 33d5f27285a4..d8f7877349c9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi @@ -35,7 +35,7 @@ pwm-beeper { compatible = "pwm-beeper"; - pwms = <&pwm8 0 5000>; + pwms = <&pwm8 0 5000 0>; }; reg_3v3: regulator-3v3 { @@ -152,7 +152,6 @@ }; &pwm8 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm8>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi index 07dcecbe485d..fe307f49b9e5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi @@ -22,7 +22,7 @@ backlight: backlight { compatible = "pwm-backlight"; - pwms = <&pwm3 0 5000000>; + pwms = <&pwm3 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; status = "okay"; @@ -177,7 +177,6 @@ }; &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts new file mode 100644 index 000000000000..cfcd8783c31d --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-emmc.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Linumiz + * Author: Parthiban <parthiban@linumiz.com> + */ + +/dts-v1/; +#include "imx6ull.dtsi" +#include "imx6ull-seeed-npi.dtsi" +#include "imx6ull-seeed-npi-dev-board.dtsi" + +/ { + model = "Seeed NPi iMX6ULL Dev Board with NAND"; + compatible = "seeed,imx6ull-seeed-npi-emmc", "seeed,imx6ull-seeed-npi", "fsl,imx6ull"; +}; + +&usdhc2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts new file mode 100644 index 000000000000..87c9434b09c5 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board-nand.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Linumiz + * Author: Parthiban <parthiban@linumiz.com> + */ + +/dts-v1/; +#include "imx6ull.dtsi" +#include "imx6ull-seeed-npi.dtsi" +#include "imx6ull-seeed-npi-dev-board.dtsi" + +/ { + model = "Seeed NPi iMX6ULL Dev Board with NAND"; + compatible = "seeed,imx6ull-seeed-npi-nand", "seeed,imx6ull-seeed-npi", "fsl,imx6ull"; +}; + +&gpmi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi new file mode 100644 index 000000000000..6bb12e0bbc7e --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi @@ -0,0 +1,424 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Linumiz + * Author: Parthiban <parthiban@linumiz.com> + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + chosen { + stdout-path = &uart1; + }; + + gpio_buttons: gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_button>; + + button-0 { + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + label = "SW2"; + linux,code = <KEY_A>; + wakeup-source; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led-blue { + gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; + label = "LED_B"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led-green { + gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; + label = "LED_G"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led-red { + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + label = "LED_R"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led-user { + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + label = "User"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + }; + + reg_5v_sys: regulator-5v-sys { + compatible = "regulator-fixed"; + regulator-name = "5V_SYS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_5v_sys>; + }; + + reg_3v3_in: regulator-3v3-in { + compatible = "regulator-fixed"; + regulator-name = "3V3_IN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_5v_sys>; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_3v3_in>; + }; + + reg_sd1_vmmc: regulator-sd1-vmmc { + compatible = "regulator-fixed"; + regulator-name = "3V3_SD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_vmmc>; + enable-active-high; + regulator-always-on; + vin-supply = <®_3v3>; + }; +}; + +&csi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csi1>; + status = "disabled"; /* LED Blue & Green shared */ +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&lcdif { + pinctrl-0 = <&pinctrl_lcdif>; + pinctrl-names = "default"; + status = "disabled"; +}; + +®_dcdc_3v3 { + vin-supply = <®_3v3_in>; +}; + +&sai2 { + assigned-clock-rates = <320000000>; + assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>; + pinctrl-0 = <&pinctrl_sai2>; + pinctrl-names = "default"; + status = "okay"; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; + status = "okay"; +}; + +&uart3 { + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_cd>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_cd>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + vmmc-supply = <®_sd1_vmmc>; + status = "okay"; +}; + +&iomuxc { + pinctrl_button: buttongrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0 + >; + }; + + pinctrl_csi1: csi1grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + >; + }; + + pinctrl_gpio_leds: ledgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x0b0b0 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x0b0b0 + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x0b0b0 + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 + >; + }; + + pinctrl_lcdif: lcdif-grp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79 + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x79 + >; + }; + + pinctrl_reg_vmmc: usdhc1regvmmc { + fsl,pins = < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 + >; + }; + + pinctrl_sai2: sai2-grp { + fsl,pins = < + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pin = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pin = < + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 + MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pin = < + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1 + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pin = < + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pin = < + MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1 + MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + fsl,pin = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc1_cd: usdhc1cd { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi new file mode 100644 index 000000000000..f5ad6b5c1ad0 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi.dtsi @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Linumiz + * Author: Parthiban <parthiban@linumiz.com> + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Seeed NPi-iMX6ULL Dev Board"; + compatible = "seeed,imx6ull-seeed-npi", "fsl,imx6ull"; + + reg_dcdc_3v3: regulator-dcdc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "DCDC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_dram_1v35: regulator-dram-1v35 { + compatible = "regulator-fixed"; + regulator-name = "DRAM_1V35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + vin-supply = <®_dcdc_3v3>; + }; + + reg_vdd_arm_soc_in: regulator-vdd-arm-soc-in { + compatible = "regulator-fixed"; + regulator-name = "VDD_ARM_SOC_IN"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + vin-supply = <®_dcdc_3v3>; + }; + + reg_dcdc_1v8: regulator-dcdc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "DCDC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <®_dcdc_3v3>; + }; + + reg_sd1_vqmmc: regulator-sd1-vqmmc { + compatible = "regulator-fixed"; + regulator-name = "NVCC_SD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_vqmmc>; + regulator-always-on; + vin-supply = <®_dcdc_1v8>; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + status = "disabled"; +}; + +&usdhc1 { + vqmmc-supply = <®_sd1_vqmmc>; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; + status = "disabled"; +}; + +&iomuxc { + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6UL_PAD_NAND_DQS__RAWNAND_DQS 0x0b0b1 + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x0b0b1 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x0b0b1 + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0x0b0b1 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x0b000 + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x0b0b1 + MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0x0b0b1 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x0b0b1 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x0b0b1 + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x0b0b1 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x0b0b1 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x0b0b1 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x0b0b1 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x0b0b1 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x0b0b1 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x0b0b1 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x0b0b1 + >; + }; + + pinctrl_reg_vqmmc: usdhc1regvqmmc { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts index 67007ce383e3..f9bbd589b66d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-master.dts @@ -45,7 +45,7 @@ interrupts = <19 IRQ_TYPE_EDGE_RISING>; spi-cpha; spi-cpol; - spi-max-frequency = <16000000>; + spi-max-frequency = <12000000>; }; }; @@ -63,7 +63,7 @@ interrupts = <9 IRQ_TYPE_EDGE_RISING>; spi-cpha; spi-cpol; - spi-max-frequency = <16000000>; + spi-max-frequency = <12000000>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts index cee223b5f8e1..ef06619d7c86 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slave.dts @@ -23,7 +23,7 @@ interrupts = <19 IRQ_TYPE_EDGE_RISING>; spi-cpha; spi-cpol; - spi-max-frequency = <16000000>; + spi-max-frequency = <12000000>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts index 7fd53b7a4372..83db65bf630f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-slavext.dts @@ -45,7 +45,7 @@ interrupts = <19 IRQ_TYPE_EDGE_RISING>; spi-cpha; spi-cpol; - spi-max-frequency = <16000000>; + spi-max-frequency = <12000000>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts new file mode 100644 index 000000000000..e4576d509a5b --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts @@ -0,0 +1,566 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2022-2024 Sebastian Reichel <sre@kernel.org> + +/dts-v1/; +#include "imx6ull.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/clock/imx6ul-clock.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "UNI-T UTi260B Thermal Camera"; + compatible = "uni-t,uti260b", "fsl,imx6ull"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + panel_backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_backlight_enable>; + power-supply = <®_vsd>; + pwms = <&pwm1 0 50000 0>; + }; + + battery: battery { + compatible = "simple-battery"; + /* generic 26650 battery */ + device-chemistry = "lithium-ion"; + charge-full-design-microamp-hours = <5000000>; + voltage-max-design-microvolt = <4200000>; + voltage-min-design-microvolt = <3300000>; + }; + + tp5000: charger { + compatible = "gpio-charger"; + charger-type = "usb-sdp"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat1>; + }; + + fuel-gauge { + compatible = "adc-battery"; + charged-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + io-channel-names = "voltage"; + io-channels = <&adc1 7>; + monitored-battery = <&battery>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_charger_stat2>; + power-supplies = <&tp5000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gpio_keys>; + autorepeat; + + up-key { + label = "Up"; + gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; + linux,code = <KEY_UP>; + }; + + down-key { + label = "Down"; + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + linux,code = <KEY_DOWN>; + }; + + left-key { + label = "Left"; + gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + linux,code = <KEY_LEFT>; + }; + + right-key { + label = "Right"; + gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RIGHT>; + }; + + ok-key { + label = "Ok"; + gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; + linux,code = <KEY_ENTER>; + }; + + return-key { + label = "Return"; + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code = <KEY_ESC>; + }; + + play-key { + label = "Media"; + gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + linux,code = <KEY_MEDIA>; + }; + + trigger-key { + label = "Trigger"; + gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + linux,code = <BTN_TRIGGER>; + }; + + power-key { + label = "Power"; + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + }; + + light-key { + label = "Light"; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_LIGHTS_TOGGLE>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&mux_led_ctrl>; + + led { + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_FLASH; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff>; + }; + + reg_vref: regulator-vref-4v2 { + compatible = "regulator-fixed"; + regulator-name = "VREF_4V2"; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + }; + + reg_vsd: regulator-vsd { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&adc1 { + #io-channel-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_adc>; + vref-supply = <®_vref>; + status = "okay"; +}; + +&csi { + pinctrl-names = "default"; + pinctrl-0 = <&mux_csi>; + status = "okay"; + + port { + parallel_from_gc0308: endpoint { + remote-endpoint = <&gc0308_to_parallel>; + }; + }; +}; + +&ecspi3 { + cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_spi3>; + status = "okay"; + + panel@0 { + compatible = "inanbo,t28cp45tn89-v17"; + reg = <0>; + backlight = <&panel_backlight>; + power-supply = <®_vsd>; + spi-cpha; + spi-cpol; + spi-max-frequency = <1000000>; + spi-rx-bus-width = <0>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; +}; + +&gpio1 { + ir-reset-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + line-name = "ir-reset-gpio"; + output-low; + pinctrl-names = "default"; + pinctrl-0 = <&mux_ir_reset>; + }; +}; + +&gpio2 { + /* configuring this to output-high results in poweroff */ + power-en-hog { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "power-en-gpio"; + output-low; + pinctrl-names = "default"; + pinctrl-0 = <&mux_poweroff2>; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c1>; + status = "okay"; + + camera@21 { + compatible = "galaxycore,gc0308"; + reg = <0x21>; + clocks = <&clks IMX6UL_CLK_CSI>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_gc0308>; + powerdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + vdd28-supply = <®_vsd>; + + port { + gc0308_to_parallel: endpoint { + remote-endpoint = <¶llel_from_gc0308>; + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; /* active high */ + vsync-active = <1>; /* active high */ + data-active = <1>; /* active high */ + pclk-sample = <1>; /* sample on rising edge */ + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_i2c2>; + status = "okay"; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&lcdif { + assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names = "default"; + pinctrl-0 = <&mux_lcd_data>, <&mux_lcd_ctrl>; + status = "okay"; + + port { + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_pwm>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_uart>; + status = "okay"; +}; + +&usbotg1 { + /* USB-C connector */ + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + /* thermal sensor */ + disable-over-current; + dr_mode = "host"; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <106>; +}; + +&usbphy2 { + fsl,tx-d-cal = <106>; +}; + +&usdhc1 { + /* MicroSD */ + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&mux_sdhc1>, <&mux_sdhc1_cd>; + pinctrl-1 = <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>; + pinctrl-2 = <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>; + wakeup-source; + vmmc-supply = <®_vsd>; + status = "okay"; +}; + +&usdhc2 { + /* eMMC */ + keep-power-in-suspend; + no-1-8-v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&mux_sdhc2>; + wakeup-source; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&mux_wdog>; +}; + +&iomuxc { + mux_adc: adcgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0 + >; + }; + + mux_backlight_enable: blenablegrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008 + >; + }; + + mux_charger_stat1: charger1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008 + >; + }; + + mux_charger_stat2: charger2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008 + >; + }; + + mux_csi: csi1grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + mux_gc0308: gc0308grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038 + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088 + MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088 + >; + }; + + mux_gpio_keys: gpiokeygrp { + fsl,pins = < + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008 + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008 + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008 + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008 + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008 + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008 + >; + }; + + mux_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + mux_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8 + >; + }; + + mux_ir_reset: irresetgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008 + >; + }; + + mux_lcd_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + mux_lcd_data: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + mux_led_ctrl: ledctrlgrp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008 + >; + }; + + mux_poweroff: poweroffgrp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008 + >; + }; + + mux_poweroff2: poweroff2grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008 + >; + }; + + mux_pwm: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + mux_sdhc1: sdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + mux_sdhc1_100mhz: sdhc1-100mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + mux_sdhc1_200mhz: sdhc1-200mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + mux_sdhc1_cd: sdhc1-cd-grp { + fsl,pins = < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + mux_sdhc2: sdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + mux_spi3: ecspi3grp { + fsl,pins = < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008 + >; + }; + + mux_uart: uartgrp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + mux_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi index 9c81c6baa2d3..22dd72499ef2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi @@ -636,6 +636,15 @@ clock-names = "snvs-rtc"; }; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + value = <0x60>; + mask = <0x60>; + status = "disabled"; + }; + snvs_pwrkey: snvs-powerkey { compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index 6478a39b3be5..e2e922bdc9e9 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_QCOM) += \ + msm8226-motorola-falcon.dtb \ qcom-apq8016-sbc.dtb \ qcom-apq8026-asus-sparrow.dtb \ qcom-apq8026-huawei-sturgeon.dtb \ @@ -45,7 +46,9 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974pro-fairphone-fp2.dtb \ qcom-msm8974pro-oneplus-bacon.dtb \ qcom-msm8974pro-samsung-klte.dtb \ + qcom-msm8974pro-samsung-kltechn.dtb \ qcom-msm8974pro-sony-xperia-shinano-castor.dtb \ + qcom-msm8974pro-sony-xperia-shinano-leo.dtb \ qcom-mdm9615-wp8548-mangoh-green.dtb \ qcom-sdx55-mtp.dtb \ qcom-sdx55-t55.dtb \ diff --git a/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts b/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts new file mode 100644 index 000000000000..029e1b1659c9 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts @@ -0,0 +1,359 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/dts-v1/; + +#include "qcom-msm8226.dtsi" +#include "pm8226.dtsi" + +/delete-node/ &smem_region; + +/ { + model = "Motorola Moto G (2013)"; + compatible = "motorola,falcon", "qcom,msm8226"; + chassis-type = "handset"; + + aliases { + mmc0 = &sdhc_1; + }; + + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@3200000 { + compatible = "simple-framebuffer"; + reg = <0x03200000 0x800000>; + width = <720>; + height = <1280>; + stride = <(720 * 3)>; + format = "r8g8b8"; + vsp-supply = <®_lcd_pos>; + vsn-supply = <®_lcd_neg>; + vddio-supply = <&vddio_disp_vreg>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + event-hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 51 GPIO_ACTIVE_LOW>; + linux,input-type = <EV_SW>; + linux,code = <SW_LID>; + linux,can-disable; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&tlmm 106 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + }; + }; + + vddio_disp_vreg: regulator-vddio-disp { + compatible = "regulator-fixed"; + regulator-name = "vddio_disp"; + gpio = <&tlmm 34 GPIO_ACTIVE_HIGH>; + vin-supply = <&pm8226_l8>; + startup-delay-us = <300>; + enable-active-high; + regulator-boot-on; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@3200000 { + reg = <0x03200000 0x800000>; + no-map; + }; + + dhob@f500000 { + reg = <0x0f500000 0x40000>; + no-map; + }; + + shob@f540000 { + reg = <0x0f540000 0x2000>; + no-map; + }; + + smem_region: smem@fa00000 { + reg = <0x0fa00000 0x100000>; + no-map; + }; + + /* Actually <0x0fa00000 0x500000>, but first 100000 is smem */ + reserved@fb00000 { + reg = <0x0fb00000 0x400000>; + no-map; + }; + }; +}; + +&blsp1_i2c3 { + status = "okay"; + + regulator@3e { + compatible = "ti,tps65132"; + reg = <0x3e>; + pinctrl-0 = <®_lcd_default>; + pinctrl-names = "default"; + + reg_lcd_pos: outp { + regulator-name = "outp"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-active-discharge = <1>; + regulator-boot-on; + enable-gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + reg_lcd_neg: outn { + regulator-name = "outn"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-active-discharge = <1>; + regulator-boot-on; + enable-gpios = <&tlmm 33 GPIO_ACTIVE_HIGH>; + }; + }; + + temperature-sensor@48 { + compatible = "ti,tmp108"; + reg = <0x48>; + interrupts-extended = <&tlmm 13 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&temp_alert_default>; + pinctrl-names = "default"; + #thermal-sensor-cells = <0>; + }; +}; + +&pm8226_resin { + linux,code = <KEY_VOLUMEDOWN>; + status = "okay"; +}; + +&pm8226_vib { + status = "okay"; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-pm8226-regulators"; + + pm8226_s3: s3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + }; + + pm8226_s5: s5 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + }; + + pm8226_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l3: l3 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1337500>; + }; + + pm8226_l4: l4 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l5: l5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-allow-set-load; + }; + + pm8226_l7: l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1850000>; + }; + + pm8226_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l9: l9 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l14: l14 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <2750000>; + }; + + pm8226_l15: l15 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + pm8226_l16: l16 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3350000>; + }; + + pm8226_l17: l17 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l18: l18 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l19: l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8226_l20: l20 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + pm8226_l21: l21 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-allow-set-load; + }; + + pm8226_l22: l22 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l23: l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l24: l24 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1350000>; + }; + + pm8226_l25: l25 { + regulator-min-microvolt = <1775000>; + regulator-max-microvolt = <2125000>; + }; + + pm8226_l26: l26 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l27: l27 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l28: l28 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + }; + + pm8226_lvs1: lvs1 { + regulator-always-on; + }; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8226_l17>; + vqmmc-supply = <&pm8226_l6>; + + bus-width = <8>; + non-removable; + + status = "okay"; +}; + +&smbb { + qcom,fast-charge-safe-current = <2000000>; + qcom,fast-charge-current-limit = <1900000>; + qcom,fast-charge-safe-voltage = <4400000>; + qcom,minimum-input-voltage = <4300000>; + + status = "okay"; +}; + +&tlmm { + reg_lcd_default: reg-lcd-default-state { + pins = "gpio31", "gpio33"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + + reg_vddio_disp_default: reg-vddio-disp-default-state { + pins = "gpio34"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + + temp_alert_default: temp-alert-default-state { + pins = "gpio13"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-disable; + }; +}; + +&usb { + extcon = <&smbb>; + dr_mode = "peripheral"; + status = "okay"; +}; + +&usb_hs_phy { + extcon = <&smbb>; + v1p8-supply = <&pm8226_l10>; + v3p3-supply = <&pm8226_l20>; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 9a5ba978775a..11e60b74c3c9 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -87,7 +87,7 @@ }; idle-states { - CPU_SPC: spc { + CPU_SPC: cpu-spc { compatible = "qcom,idle-state-spc", "arm,idle-state"; entry-latency-us = <400>; @@ -1334,6 +1334,16 @@ <&gcc PCIE_PHY_RESET>; reset-names = "axi", "ahb", "por", "pci", "phy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; hdmi: hdmi-tx@4a00000 { diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi index 8204e64d9a97..ca53dff820ef 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi @@ -79,7 +79,7 @@ }; idle-states { - CPU_SPC: spc { + CPU_SPC: cpu-spc { compatible = "qcom,idle-state-spc", "arm,idle-state"; entry-latency-us = <150>; diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index 681cb3fc8085..0fb65f2bbcdf 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -470,6 +470,16 @@ "phy_ahb"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; qpic_bam: dma-controller@7984000 { @@ -598,24 +608,33 @@ reg = <0x90000 0x64>; status = "disabled"; - ethphy0: ethernet-phy@0 { + ethernet-phy-package@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,qca8075-package"; reg = <0>; - }; - ethphy1: ethernet-phy@1 { - reg = <1>; - }; + qcom,tx-drive-strength-milliwatt = <300>; - ethphy2: ethernet-phy@2 { - reg = <2>; - }; + ethphy0: ethernet-phy@0 { + reg = <0>; + }; - ethphy3: ethernet-phy@3 { - reg = <3>; - }; + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; - ethphy4: ethernet-phy@4 { - reg = <4>; + ethphy4: ethernet-phy@4 { + reg = <4>; + }; }; }; diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi index 2eb6758b6a3a..f128510d8445 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -1121,6 +1121,16 @@ status = "disabled"; perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie1: pcie@1b700000 { @@ -1172,6 +1182,16 @@ status = "disabled"; perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie2: pcie@1b900000 { @@ -1223,6 +1243,16 @@ status = "disabled"; perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; qsgmii_csr: syscon@1bb00000 { diff --git a/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi index 36328dbe4212..1ba403b83cb1 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi @@ -26,7 +26,7 @@ }; &CPU_SLEEP_0 { - compatible = "qcom,idle-state-spc"; + compatible = "qcom,idle-state-spc", "arm,idle-state"; }; &cpu0_acc { diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index 5efc38d712cc..5651bb31bd54 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -14,6 +14,8 @@ #size-cells = <1>; interrupt-parent = <&intc>; + chosen { }; + clocks { xo_board: xo_board { compatible = "fixed-clock"; @@ -85,7 +87,7 @@ }; idle-states { - CPU_SPC: spc { + CPU_SPC: cpu-spc { compatible = "qcom,idle-state-spc", "arm,idle-state"; entry-latency-us = <150>; @@ -103,7 +105,7 @@ }; }; - memory { + memory@0 { device_type = "memory"; reg = <0x0 0x0>; }; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi new file mode 100644 index 000000000000..b5443fd5b425 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi @@ -0,0 +1,818 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974pro.dtsi" +#include "pma8084.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + chassis-type = "handset"; + + aliases { + serial0 = &blsp1_uart1; + mmc0 = &sdhc_1; /* SDC1 eMMC slot */ + mmc1 = &sdhc_3; /* SDC2 SD card slot */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pin_a>; + + key-volume-down { + label = "volume_down"; + gpios = <&pma8084_gpios 2 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = <KEY_VOLUMEDOWN>; + debounce-interval = <15>; + }; + + key-home { + label = "home_key"; + gpios = <&pma8084_gpios 3 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = <KEY_HOMEPAGE>; + wakeup-source; + debounce-interval = <15>; + }; + + key-volume-up { + label = "volume_up"; + gpios = <&pma8084_gpios 5 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + }; + }; + + i2c-gpio-touchkey { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + sda-gpios = <&tlmm 95 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&tlmm 96 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c_touchkey_pins>; + + touchkey@20 { + compatible = "cypress,tm2-touchkey"; + reg = <0x20>; + + interrupt-parent = <&pma8084_gpios>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&touchkey_pin>; + + vcc-supply = <&max77826_ldo15>; + vdd-supply = <&pma8084_l19>; + + linux,keycodes = <KEY_APPSELECT KEY_BACK>; + }; + }; + + i2c_led_gpio: i2c-gpio-led { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c_led_gpioex_pins>; + + i2c-gpio,delay-us = <2>; + + gpio_expander: gpio@20 { + compatible = "nxp,pcal6416"; + reg = <0x20>; + + gpio-controller; + #gpio-cells = <2>; + + vcc-supply = <&pma8084_s4>; + + pinctrl-names = "default"; + pinctrl-0 = <&gpioex_pin>; + + reset-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; + }; + + led-controller@30 { + compatible = "panasonic,an30259a"; + reg = <0x30>; + + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + }; + + led@2 { + reg = <2>; + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + }; + + led@3 { + reg = <3>; + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_BLUE>; + }; + }; + }; + + vreg_wlan: wlan-regulator { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_expander 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vreg_panel: panel-regulator { + compatible = "regulator-fixed"; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_en_pin>; + + regulator-name = "panel-vddr-reg"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + + gpio = <&pma8084_gpios 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vreg_vph_pwr: vreg-vph-pwr { + compatible = "regulator-fixed"; + regulator-name = "vph-pwr"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + + regulator-always-on; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + touchscreen@20 { + compatible = "syna,rmi4-i2c"; + reg = <0x20>; + + interrupt-parent = <&pma8084_gpios>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply = <&max77826_ldo13>; + vio-supply = <&pma8084_lvs2>; + + pinctrl-names = "default"; + pinctrl-0 = <&touch_pin>; + + syna,startup-delay-ms = <100>; + + #address-cells = <1>; + #size-cells = <0>; + + rmi4-f01@1 { + reg = <0x1>; + syna,nosleep-mode = <1>; + }; + + rmi4-f12@12 { + reg = <0x12>; + syna,sensor-type = <1>; + }; + }; +}; + +&blsp1_i2c6 { + status = "okay"; + + pmic@60 { + reg = <0x60>; + compatible = "maxim,max77826"; + + regulators { + max77826_ldo1: LDO1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + max77826_ldo2: LDO2 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + max77826_ldo3: LDO3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + max77826_ldo4: LDO4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + max77826_ldo5: LDO5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + max77826_ldo6: LDO6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + max77826_ldo7: LDO7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + max77826_ldo8: LDO8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + max77826_ldo9: LDO9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + max77826_ldo10: LDO10 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2950000>; + }; + + max77826_ldo11: LDO11 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2950000>; + }; + + max77826_ldo12: LDO12 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + }; + + max77826_ldo13: LDO13 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + max77826_ldo14: LDO14 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + max77826_ldo15: LDO15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + max77826_buck: BUCK { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + max77826_buckboost: BUCKBOOST { + regulator-min-microvolt = <3400000>; + regulator-max-microvolt = <3400000>; + }; + }; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&blsp2_i2c6 { + status = "okay"; + + fuelgauge@36 { + compatible = "maxim,max17048"; + reg = <0x36>; + + maxim,double-soc; + maxim,rcomp = /bits/ 8 <0x56>; + + interrupt-parent = <&pma8084_gpios>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&fuelgauge_pin>; + }; +}; + +&blsp2_uart2 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp2_uart2_pins_active>; + pinctrl-1 = <&blsp2_uart2_pins_sleep>; + + bluetooth { + compatible = "brcm,bcm43540-bt"; + max-speed = <3000000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_pins>; + device-wakeup-gpios = <&tlmm 91 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio_expander 9 GPIO_ACTIVE_HIGH>; + interrupt-parent = <&tlmm>; + interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wakeup"; + }; +}; + +&gpu { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; + + vdda-supply = <&pma8084_l2>; + vdd-supply = <&pma8084_l22>; + vddio-supply = <&pma8084_l12>; + + panel: panel@0 { + reg = <0>; + compatible = "samsung,s6e3fa2"; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_te_pin &panel_rst_pin>; + + iovdd-supply = <&pma8084_lvs4>; + vddr-supply = <&vreg_panel>; + + reset-gpios = <&pma8084_gpios 17 GPIO_ACTIVE_LOW>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + remote-endpoint = <&panel_in>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + status = "okay"; + + vddio-supply = <&pma8084_l12>; +}; + +&pma8084_gpios { + gpio_keys_pin_a: gpio-keys-active-state { + pins = "gpio2", "gpio3", "gpio5"; + function = "normal"; + + bias-pull-up; + power-source = <PMA8084_GPIO_S4>; + }; + + touchkey_pin: touchkey-int-state { + pins = "gpio6"; + function = "normal"; + bias-disable; + input-enable; + power-source = <PMA8084_GPIO_S4>; + }; + + touch_pin: touchscreen-int-state { + pins = "gpio8"; + function = "normal"; + bias-disable; + input-enable; + power-source = <PMA8084_GPIO_S4>; + }; + + panel_en_pin: panel-en-state { + pins = "gpio14"; + function = "normal"; + bias-pull-up; + power-source = <PMA8084_GPIO_S4>; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + }; + + wlan_sleep_clk_pin: wlan-sleep-clk-state { + pins = "gpio16"; + function = "func2"; + + output-high; + power-source = <PMA8084_GPIO_S4>; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; + }; + + panel_rst_pin: panel-rst-state { + pins = "gpio17"; + function = "normal"; + bias-disable; + power-source = <PMA8084_GPIO_S4>; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + }; + + fuelgauge_pin: fuelgauge-int-state { + pins = "gpio21"; + function = "normal"; + bias-disable; + input-enable; + power-source = <PMA8084_GPIO_S4>; + }; +}; + +&remoteproc_adsp { + status = "okay"; + cx-supply = <&pma8084_s2>; +}; + +&remoteproc_mss { + status = "okay"; + cx-supply = <&pma8084_s2>; + mss-supply = <&pma8084_s6>; + mx-supply = <&pma8084_s1>; + pll-supply = <&pma8084_l12>; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pma8084-regulators"; + + pma8084_s1: s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + }; + + pma8084_s2: s2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pma8084_s3: s3 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + }; + + pma8084_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pma8084_s5: s5 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + }; + + pma8084_s6: s6 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + pma8084_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pma8084_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pma8084_l3: l3 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1200000>; + }; + + pma8084_l4: l4 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1225000>; + }; + + pma8084_l5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pma8084_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pma8084_l7: l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pma8084_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pma8084_l9: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pma8084_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pma8084_l11: l11 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + }; + + pma8084_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + pma8084_l13: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pma8084_l14: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pma8084_l15: l15 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pma8084_l16: l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + pma8084_l17: l17 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pma8084_l18: l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pma8084_l19: l19 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + pma8084_l20: l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <200000>; + regulator-allow-set-load; + }; + + pma8084_l21: l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <200000>; + regulator-allow-set-load; + }; + + pma8084_l22: l22 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + }; + + pma8084_l23: l23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + pma8084_l24: l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + pma8084_l25: l25 { + regulator-min-microvolt = <2100000>; + regulator-max-microvolt = <2100000>; + }; + + pma8084_l26: l26 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2050000>; + }; + + pma8084_l27: l27 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1225000>; + }; + + pma8084_lvs1: lvs1 {}; + pma8084_lvs2: lvs2 {}; + pma8084_lvs3: lvs3 {}; + pma8084_lvs4: lvs4 {}; + + pma8084_5vs1: 5vs1 {}; + }; +}; + +&sdhc_1 { + status = "okay"; + + vmmc-supply = <&pma8084_l20>; + vqmmc-supply = <&pma8084_s4>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; +}; + +&sdhc_2 { + status = "okay"; + max-frequency = <100000000>; + vmmc-supply = <&vreg_wlan>; + vqmmc-supply = <&pma8084_s4>; + non-removable; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + + wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + + /* + * Allow all klte* variants to load the same NVRAM file, + * as they have little difference in the WiFi part. + */ + brcm,board-type = "samsung,klte"; + + interrupt-parent = <&tlmm>; + interrupts = <92 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_sleep_clk_pin &wifi_pin>; + }; +}; + +&sdhc_3 { + status = "okay"; + max-frequency = <100000000>; + vmmc-supply = <&pma8084_l21>; + vqmmc-supply = <&pma8084_l13>; + + /* + * cd-gpio is intentionally disabled. If enabled, an SD card + * present during boot is not initialized correctly. Without + * cd-gpios the driver resorts to polling, so hotplug works. + */ + pinctrl-names = "default"; + pinctrl-0 = <&sdc3_on /* &sdhc3_cd_pin */>; + /* cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; */ +}; + +&tlmm { + /* This seems suspicious, but somebody with this device should look into it. */ + blsp2_uart2_pins_active: blsp2-uart2-pins-active-state { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "blsp_uart8"; + drive-strength = <8>; + bias-disable; + }; + + blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep-state { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + bt_pins: bt-pins-state { + hostwake-pins { + pins = "gpio75"; + function = "gpio"; + drive-strength = <16>; + }; + + devwake-pins { + pins = "gpio91"; + function = "gpio"; + drive-strength = <2>; + }; + }; + + sdc1_on: sdhc1-on-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <4>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <4>; + bias-pull-up; + }; + }; + + sdc3_on: sdc3-on-state { + pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; + function = "sdc3"; + drive-strength = <8>; + bias-disable; + }; + + sdhc3_cd_pin: sdc3-cd-on-state { + pins = "gpio62"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + + sdc2_on: sdhc2-on-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <6>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc2_cmd", "sdc2_data"; + drive-strength = <6>; + bias-pull-up; + }; + }; + + i2c_touchkey_pins: i2c-touchkey-state { + pins = "gpio95", "gpio96"; + function = "gpio"; + bias-pull-up; + }; + + i2c_led_gpioex_pins: i2c-led-gpioex-state { + function = "gpio"; + bias-pull-down; + }; + + gpioex_pin: gpioex-state { + pins = "gpio145"; + function = "gpio"; + bias-pull-up; + drive-strength = <2>; + }; + + wifi_pin: wifi-state { + pins = "gpio92"; + function = "gpio"; + bias-pull-down; + }; + + panel_te_pin: panel-state { + pins = "gpio12"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-disable; + }; +}; + +&usb { + status = "okay"; + + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pma8084_l6>; + v3p3-supply = <&pma8084_l24>; + + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts index b93539e2b87e..954665f3a9dd 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts @@ -1,817 +1,16 @@ // SPDX-License-Identifier: GPL-2.0 -#include "qcom-msm8974pro.dtsi" -#include "pma8084.dtsi" -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> -#include <dt-bindings/leds/common.h> +#include "qcom-msm8974pro-samsung-klte-common.dtsi" / { model = "Samsung Galaxy S5"; compatible = "samsung,klte", "qcom,msm8974pro", "qcom,msm8974"; - chassis-type = "handset"; - - aliases { - serial0 = &blsp1_uart1; - mmc0 = &sdhc_1; /* SDC1 eMMC slot */ - mmc1 = &sdhc_3; /* SDC2 SD card slot */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_pin_a>; - - key-volume-down { - label = "volume_down"; - gpios = <&pma8084_gpios 2 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_VOLUMEDOWN>; - debounce-interval = <15>; - }; - - key-home { - label = "home_key"; - gpios = <&pma8084_gpios 3 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_HOMEPAGE>; - wakeup-source; - debounce-interval = <15>; - }; - - key-volume-up { - label = "volume_up"; - gpios = <&pma8084_gpios 5 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_VOLUMEUP>; - debounce-interval = <15>; - }; - }; - - i2c-gpio-touchkey { - compatible = "i2c-gpio"; - #address-cells = <1>; - #size-cells = <0>; - sda-gpios = <&tlmm 95 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - scl-gpios = <&tlmm 96 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c_touchkey_pins>; - - touchkey@20 { - compatible = "cypress,tm2-touchkey"; - reg = <0x20>; - - interrupt-parent = <&pma8084_gpios>; - interrupts = <6 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&touchkey_pin>; - - vcc-supply = <&max77826_ldo15>; - vdd-supply = <&pma8084_l19>; - - linux,keycodes = <KEY_APPSELECT KEY_BACK>; - }; - }; - - i2c-gpio-led { - compatible = "i2c-gpio"; - #address-cells = <1>; - #size-cells = <0>; - scl-gpios = <&tlmm 121 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&tlmm 120 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c_led_gpioex_pins>; - - i2c-gpio,delay-us = <2>; - - gpio_expander: gpio@20 { - compatible = "nxp,pcal6416"; - reg = <0x20>; - - gpio-controller; - #gpio-cells = <2>; - - vcc-supply = <&pma8084_s4>; - - pinctrl-names = "default"; - pinctrl-0 = <&gpioex_pin>; - - reset-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; - }; - - led-controller@30 { - compatible = "panasonic,an30259a"; - reg = <0x30>; - - #address-cells = <1>; - #size-cells = <0>; - - led@1 { - reg = <1>; - function = LED_FUNCTION_STATUS; - color = <LED_COLOR_ID_RED>; - }; - - led@2 { - reg = <2>; - function = LED_FUNCTION_STATUS; - color = <LED_COLOR_ID_GREEN>; - }; - - led@3 { - reg = <3>; - function = LED_FUNCTION_STATUS; - color = <LED_COLOR_ID_BLUE>; - }; - }; - }; - - vreg_wlan: wlan-regulator { - compatible = "regulator-fixed"; - - regulator-name = "wl-reg"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio_expander 8 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vreg_panel: panel-regulator { - compatible = "regulator-fixed"; - - pinctrl-names = "default"; - pinctrl-0 = <&panel_en_pin>; - - regulator-name = "panel-vddr-reg"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - - gpio = <&pma8084_gpios 14 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vreg_vph_pwr: vreg-vph-pwr { - compatible = "regulator-fixed"; - regulator-name = "vph-pwr"; - - regulator-min-microvolt = <3600000>; - regulator-max-microvolt = <3600000>; - - regulator-always-on; - }; -}; - -&blsp1_i2c2 { - status = "okay"; - - touchscreen@20 { - compatible = "syna,rmi4-i2c"; - reg = <0x20>; - - interrupt-parent = <&pma8084_gpios>; - interrupts = <8 IRQ_TYPE_EDGE_FALLING>; - - vdd-supply = <&max77826_ldo13>; - vio-supply = <&pma8084_lvs2>; - - pinctrl-names = "default"; - pinctrl-0 = <&touch_pin>; - - syna,startup-delay-ms = <100>; - - #address-cells = <1>; - #size-cells = <0>; - - rmi4-f01@1 { - reg = <0x1>; - syna,nosleep-mode = <1>; - }; - - rmi4-f12@12 { - reg = <0x12>; - syna,sensor-type = <1>; - }; - }; -}; - -&blsp1_i2c6 { - status = "okay"; - - pmic@60 { - reg = <0x60>; - compatible = "maxim,max77826"; - - regulators { - max77826_ldo1: LDO1 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - max77826_ldo2: LDO2 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - }; - - max77826_ldo3: LDO3 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - max77826_ldo4: LDO4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - max77826_ldo5: LDO5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - max77826_ldo6: LDO6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - max77826_ldo7: LDO7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - max77826_ldo8: LDO8 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - max77826_ldo9: LDO9 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - max77826_ldo10: LDO10 { - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2950000>; - }; - - max77826_ldo11: LDO11 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2950000>; - }; - - max77826_ldo12: LDO12 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <3300000>; - }; - - max77826_ldo13: LDO13 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - max77826_ldo14: LDO14 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - max77826_ldo15: LDO15 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - max77826_buck: BUCK { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - }; - - max77826_buckboost: BUCKBOOST { - regulator-min-microvolt = <3400000>; - regulator-max-microvolt = <3400000>; - }; - }; - }; -}; - -&blsp1_uart2 { - status = "okay"; -}; - -&blsp2_i2c6 { - status = "okay"; - - fuelgauge@36 { - compatible = "maxim,max17048"; - reg = <0x36>; - - maxim,double-soc; - maxim,rcomp = /bits/ 8 <0x56>; - - interrupt-parent = <&pma8084_gpios>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&fuelgauge_pin>; - }; -}; - -&blsp2_uart2 { - status = "okay"; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_uart2_pins_active>; - pinctrl-1 = <&blsp2_uart2_pins_sleep>; - - bluetooth { - compatible = "brcm,bcm43540-bt"; - max-speed = <3000000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_pins>; - device-wakeup-gpios = <&tlmm 91 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio_expander 9 GPIO_ACTIVE_HIGH>; - interrupt-parent = <&tlmm>; - interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "host-wakeup"; - }; -}; - -&gpu { - status = "okay"; -}; - -&mdss { - status = "okay"; -}; - -&mdss_dsi0 { - status = "okay"; - - vdda-supply = <&pma8084_l2>; - vdd-supply = <&pma8084_l22>; - vddio-supply = <&pma8084_l12>; - - panel: panel@0 { - reg = <0>; - compatible = "samsung,s6e3fa2"; - - pinctrl-names = "default"; - pinctrl-0 = <&panel_te_pin &panel_rst_pin>; - - iovdd-supply = <&pma8084_lvs4>; - vddr-supply = <&vreg_panel>; - - reset-gpios = <&pma8084_gpios 17 GPIO_ACTIVE_LOW>; - - port { - panel_in: endpoint { - remote-endpoint = <&mdss_dsi0_out>; - }; - }; - }; -}; - -&mdss_dsi0_out { - remote-endpoint = <&panel_in>; - data-lanes = <0 1 2 3>; -}; - -&mdss_dsi0_phy { - status = "okay"; - - vddio-supply = <&pma8084_l12>; }; -&pma8084_gpios { - gpio_keys_pin_a: gpio-keys-active-state { - pins = "gpio2", "gpio3", "gpio5"; - function = "normal"; - - bias-pull-up; - power-source = <PMA8084_GPIO_S4>; - }; - - touchkey_pin: touchkey-int-state { - pins = "gpio6"; - function = "normal"; - bias-disable; - input-enable; - power-source = <PMA8084_GPIO_S4>; - }; - - touch_pin: touchscreen-int-state { - pins = "gpio8"; - function = "normal"; - bias-disable; - input-enable; - power-source = <PMA8084_GPIO_S4>; - }; - - panel_en_pin: panel-en-state { - pins = "gpio14"; - function = "normal"; - bias-pull-up; - power-source = <PMA8084_GPIO_S4>; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; - }; - - wlan_sleep_clk_pin: wlan-sleep-clk-state { - pins = "gpio16"; - function = "func2"; - - output-high; - power-source = <PMA8084_GPIO_S4>; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; - }; - - panel_rst_pin: panel-rst-state { - pins = "gpio17"; - function = "normal"; - bias-disable; - power-source = <PMA8084_GPIO_S4>; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; - }; - - fuelgauge_pin: fuelgauge-int-state { - pins = "gpio21"; - function = "normal"; - bias-disable; - input-enable; - power-source = <PMA8084_GPIO_S4>; - }; +&i2c_led_gpio { + scl-gpios = <&tlmm 121 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&tlmm 120 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; }; -&remoteproc_adsp { - status = "okay"; - cx-supply = <&pma8084_s2>; -}; - -&remoteproc_mss { - status = "okay"; - cx-supply = <&pma8084_s2>; - mss-supply = <&pma8084_s6>; - mx-supply = <&pma8084_s1>; - pll-supply = <&pma8084_l12>; -}; - -&rpm_requests { - regulators-0 { - compatible = "qcom,rpm-pma8084-regulators"; - - pma8084_s1: s1 { - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <1050000>; - regulator-always-on; - }; - - pma8084_s2: s2 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1050000>; - }; - - pma8084_s3: s3 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - }; - - pma8084_s4: s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pma8084_s5: s5 { - regulator-min-microvolt = <2150000>; - regulator-max-microvolt = <2150000>; - }; - - pma8084_s6: s6 { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - }; - - pma8084_l1: l1 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - }; - - pma8084_l2: l2 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - pma8084_l3: l3 { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1200000>; - }; - - pma8084_l4: l4 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1225000>; - }; - - pma8084_l5: l5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pma8084_l6: l6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pma8084_l7: l7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pma8084_l8: l8 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pma8084_l9: l9 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - }; - - pma8084_l10: l10 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - }; - - pma8084_l11: l11 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - }; - - pma8084_l12: l12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - pma8084_l13: l13 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - }; - - pma8084_l14: l14 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pma8084_l15: l15 { - regulator-min-microvolt = <2050000>; - regulator-max-microvolt = <2050000>; - }; - - pma8084_l16: l16 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - }; - - pma8084_l17: l17 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - }; - - pma8084_l18: l18 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - }; - - pma8084_l19: l19 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - pma8084_l20: l20 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-system-load = <200000>; - regulator-allow-set-load; - }; - - pma8084_l21: l21 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-system-load = <200000>; - regulator-allow-set-load; - }; - - pma8084_l22: l22 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - }; - - pma8084_l23: l23 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - pma8084_l24: l24 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3075000>; - }; - - pma8084_l25: l25 { - regulator-min-microvolt = <2100000>; - regulator-max-microvolt = <2100000>; - }; - - pma8084_l26: l26 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2050000>; - }; - - pma8084_l27: l27 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1225000>; - }; - - pma8084_lvs1: lvs1 {}; - pma8084_lvs2: lvs2 {}; - pma8084_lvs3: lvs3 {}; - pma8084_lvs4: lvs4 {}; - - pma8084_5vs1: 5vs1 {}; - }; -}; - -&sdhc_1 { - status = "okay"; - - vmmc-supply = <&pma8084_l20>; - vqmmc-supply = <&pma8084_s4>; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_on>; - pinctrl-1 = <&sdc1_off>; -}; - -&sdhc_2 { - status = "okay"; - max-frequency = <100000000>; - vmmc-supply = <&vreg_wlan>; - vqmmc-supply = <&pma8084_s4>; - non-removable; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_on>; - pinctrl-1 = <&sdc2_off>; - - wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - - interrupt-parent = <&tlmm>; - interrupts = <92 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "host-wake"; - - pinctrl-names = "default"; - pinctrl-0 = <&wlan_sleep_clk_pin &wifi_pin>; - }; -}; - -&sdhc_3 { - status = "okay"; - max-frequency = <100000000>; - vmmc-supply = <&pma8084_l21>; - vqmmc-supply = <&pma8084_l13>; - - /* - * cd-gpio is intentionally disabled. If enabled, an SD card - * present during boot is not initialized correctly. Without - * cd-gpios the driver resorts to polling, so hotplug works. - */ - pinctrl-names = "default"; - pinctrl-0 = <&sdc3_on /* &sdhc3_cd_pin */>; - /* cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; */ -}; - -&tlmm { - /* This seems suspicious, but somebody with this device should look into it. */ - blsp2_uart2_pins_active: blsp2-uart2-pins-active-state { - pins = "gpio45", "gpio46", "gpio47", "gpio48"; - function = "blsp_uart8"; - drive-strength = <8>; - bias-disable; - }; - - blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep-state { - pins = "gpio45", "gpio46", "gpio47", "gpio48"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - bt_pins: bt-pins-state { - hostwake-pins { - pins = "gpio75"; - function = "gpio"; - drive-strength = <16>; - }; - - devwake-pins { - pins = "gpio91"; - function = "gpio"; - drive-strength = <2>; - }; - }; - - sdc1_on: sdhc1-on-state { - clk-pins { - pins = "sdc1_clk"; - drive-strength = <4>; - bias-disable; - }; - - cmd-data-pins { - pins = "sdc1_cmd", "sdc1_data"; - drive-strength = <4>; - bias-pull-up; - }; - }; - - sdc3_on: sdc3-on-state { - pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; - function = "sdc3"; - drive-strength = <8>; - bias-disable; - }; - - sdhc3_cd_pin: sdc3-cd-on-state { - pins = "gpio62"; - function = "gpio"; - - drive-strength = <2>; - bias-disable; - }; - - sdc2_on: sdhc2-on-state { - clk-pins { - pins = "sdc2_clk"; - drive-strength = <6>; - bias-disable; - }; - - cmd-data-pins { - pins = "sdc2_cmd", "sdc2_data"; - drive-strength = <6>; - bias-pull-up; - }; - }; - - i2c_touchkey_pins: i2c-touchkey-state { - pins = "gpio95", "gpio96"; - function = "gpio"; - bias-pull-up; - }; - - i2c_led_gpioex_pins: i2c-led-gpioex-state { - pins = "gpio120", "gpio121"; - function = "gpio"; - bias-pull-down; - }; - - gpioex_pin: gpioex-state { - pins = "gpio145"; - function = "gpio"; - bias-pull-up; - drive-strength = <2>; - }; - - wifi_pin: wifi-state { - pins = "gpio92"; - function = "gpio"; - bias-pull-down; - }; - - panel_te_pin: panel-state { - pins = "gpio12"; - function = "mdp_vsync"; - drive-strength = <2>; - bias-disable; - }; -}; - -&usb { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - - hnp-disable; - srp-disable; - adp-disable; -}; - -&usb_hs1_phy { - status = "okay"; - - v1p8-supply = <&pma8084_l6>; - v3p3-supply = <&pma8084_l24>; - - qcom,init-seq = /bits/ 8 <0x1 0x64>; +&i2c_led_gpioex_pins { + pins = "gpio120", "gpio121"; }; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts new file mode 100644 index 000000000000..b902e31b16c2 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-kltechn.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974pro-samsung-klte-common.dtsi" + +/ { + model = "Samsung Galaxy S5 China"; + compatible = "samsung,kltechn", "samsung,klte", "qcom,msm8974pro", "qcom,msm8974"; +}; + +&i2c_led_gpio { + scl-gpios = <&tlmm 61 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&tlmm 60 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +&i2c_led_gpioex_pins { + pins = "gpio60", "gpio61"; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts index ee94741a26ed..409d1798de34 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -1,60 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 -#include "qcom-msm8974pro.dtsi" -#include "pm8841.dtsi" -#include "pm8941.dtsi" -#include <dt-bindings/input/input.h> -#include <dt-bindings/leds/common.h> -#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi" / { model = "Sony Xperia Z2 Tablet"; compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974"; chassis-type = "tablet"; - aliases { - serial0 = &blsp1_uart2; - serial1 = &blsp2_uart1; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_pin_a>; - - key-volume-down { - label = "volume_down"; - gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_VOLUMEDOWN>; - }; - - key-camera-snapshot { - label = "camera_snapshot"; - gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_CAMERA>; - }; - - key-camera-focus { - label = "camera_focus"; - gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_CAMERA_FOCUS>; - }; - - key-volume-up { - label = "volume_up"; - gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = <KEY_VOLUMEUP>; - }; - }; - vreg_bl_vddio: lcd-backlight-vddio { compatible = "regulator-fixed"; regulator-name = "vreg_bl_vddio"; @@ -67,107 +18,15 @@ vin-supply = <&pm8941_s3>; startup-delay-us = <70000>; - pinctrl-names = "default"; pinctrl-0 = <&lcd_backlight_en_pin_a>; - }; - - vreg_vsp: lcd-dcdc-regulator { - compatible = "regulator-fixed"; - regulator-name = "vreg_vsp"; - regulator-min-microvolt = <5600000>; - regulator-max-microvolt = <5600000>; - - gpio = <&pm8941_gpios 20 GPIO_ACTIVE_HIGH>; - enable-active-high; - - pinctrl-names = "default"; - pinctrl-0 = <&lcd_dcdc_en_pin_a>; - }; - - vreg_boost: vreg-boost { - compatible = "regulator-fixed"; - - regulator-name = "vreg-boost"; - regulator-min-microvolt = <3150000>; - regulator-max-microvolt = <3150000>; - - regulator-always-on; - regulator-boot-on; - - gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>; - enable-active-high; - pinctrl-names = "default"; - pinctrl-0 = <&boost_bypass_n_pin>; }; - - vreg_vph_pwr: vreg-vph-pwr { - compatible = "regulator-fixed"; - regulator-name = "vph-pwr"; - - regulator-min-microvolt = <3600000>; - regulator-max-microvolt = <3600000>; - - regulator-always-on; - }; - - vreg_wlan: wlan-regulator { - compatible = "regulator-fixed"; - - regulator-name = "wl-reg"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&pm8941_gpios 18 GPIO_ACTIVE_HIGH>; - enable-active-high; - - pinctrl-names = "default"; - pinctrl-0 = <&wlan_regulator_pin>; - }; -}; - -&blsp1_uart2 { - status = "okay"; }; -&blsp2_i2c2 { - status = "okay"; +&blsp2_i2c5 { clock-frequency = <355000>; - synaptics@2c { - compatible = "syna,rmi4-i2c"; - reg = <0x2c>; - - interrupt-parent = <&tlmm>; - interrupts = <86 IRQ_TYPE_EDGE_FALLING>; - - #address-cells = <1>; - #size-cells = <0>; - - vdd-supply = <&pm8941_l22>; - vio-supply = <&pm8941_lvs3>; - - pinctrl-names = "default"; - pinctrl-0 = <&ts_int_pin>; - - syna,startup-delay-ms = <100>; - - rmi4-f01@1 { - reg = <0x1>; - syna,nosleep-mode = <1>; - }; - - rmi4-f11@11 { - reg = <0x11>; - syna,sensor-type = <1>; - touchscreen-inverted-x; - }; - }; -}; - -&blsp2_i2c5 { status = "okay"; - clock-frequency = <355000>; lp8566_wled: backlight@2c { compatible = "ti,lp8556"; @@ -182,42 +41,52 @@ rom-addr = /bits/ 8 <0xa0>; rom-val = /bits/ 8 <0xff>; }; + rom-a1h { rom-addr = /bits/ 8 <0xa1>; rom-val = /bits/ 8 <0x3f>; }; + rom-a2h { rom-addr = /bits/ 8 <0xa2>; rom-val = /bits/ 8 <0x20>; }; + rom-a3h { rom-addr = /bits/ 8 <0xa3>; rom-val = /bits/ 8 <0x5e>; }; + rom-a4h { rom-addr = /bits/ 8 <0xa4>; rom-val = /bits/ 8 <0x02>; }; + rom-a5h { rom-addr = /bits/ 8 <0xa5>; rom-val = /bits/ 8 <0x04>; }; + rom-a6h { rom-addr = /bits/ 8 <0xa6>; rom-val = /bits/ 8 <0x80>; }; + rom-a7h { rom-addr = /bits/ 8 <0xa7>; rom-val = /bits/ 8 <0xf7>; }; + rom-a9h { rom-addr = /bits/ 8 <0xa9>; rom-val = /bits/ 8 <0x80>; }; + rom-aah { rom-addr = /bits/ 8 <0xaa>; rom-val = /bits/ 8 <0x0f>; }; + rom-aeh { rom-addr = /bits/ 8 <0xae>; rom-val = /bits/ 8 <0x0f>; @@ -232,8 +101,8 @@ compatible = "brcm,bcm43438-bt"; max-speed = <3000000>; - pinctrl-names = "default"; pinctrl-0 = <&bt_host_wake_pin>, <&bt_dev_wake_pin>, <&bt_reg_on_pin>; + pinctrl-names = "default"; host-wakeup-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>; device-wakeup-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; @@ -241,339 +110,26 @@ }; }; -&pm8941_coincell { - status = "okay"; - - qcom,rset-ohms = <2100>; - qcom,vset-millivolts = <3000>; -}; - &pm8941_gpios { - gpio_keys_pin_a: gpio-keys-active-state { - pins = "gpio2", "gpio5"; - function = "normal"; - - bias-pull-up; - power-source = <PM8941_GPIO_S3>; - }; - bt_reg_on_pin: bt-reg-on-state { pins = "gpio16"; function = "normal"; - output-low; power-source = <PM8941_GPIO_S3>; }; - - wlan_sleep_clk_pin: wl-sleep-clk-state { - pins = "gpio17"; - function = "func2"; - - output-high; - power-source = <PM8941_GPIO_S3>; - }; - - wlan_regulator_pin: wl-reg-active-state { - pins = "gpio18"; - function = "normal"; - - bias-disable; - power-source = <PM8941_GPIO_S3>; - }; - - lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state { - pins = "gpio20"; - function = "normal"; - - bias-disable; - power-source = <PM8941_GPIO_S3>; - input-disable; - output-low; - }; - -}; - -&pm8941_lpg { - status = "okay"; - - qcom,power-source = <1>; - - multi-led { - color = <LED_COLOR_ID_RGB>; - function = LED_FUNCTION_STATUS; - - #address-cells = <1>; - #size-cells = <0>; - - led@5 { - reg = <5>; - color = <LED_COLOR_ID_BLUE>; - }; - - led@6 { - reg = <6>; - color = <LED_COLOR_ID_GREEN>; - }; - - led@7 { - reg = <7>; - color = <LED_COLOR_ID_RED>; - }; - }; -}; - -&remoteproc_adsp { - cx-supply = <&pm8841_s2>; - status = "okay"; -}; - -&remoteproc_mss { - cx-supply = <&pm8841_s2>; - mss-supply = <&pm8841_s3>; - mx-supply = <&pm8841_s1>; - pll-supply = <&pm8941_l12>; - status = "okay"; }; &rpm_requests { - regulators-0 { - compatible = "qcom,rpm-pm8841-regulators"; - - pm8841_s1: s1 { - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <1050000>; - }; - - pm8841_s2: s2 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1050000>; - }; - - pm8841_s3: s3 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1050000>; - }; - - pm8841_s4: s4 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1050000>; - }; - }; - regulators-1 { - compatible = "qcom,rpm-pm8941-regulators"; - - vdd_l1_l3-supply = <&pm8941_s1>; - vdd_l2_lvs1_2_3-supply = <&pm8941_s3>; - vdd_l4_l11-supply = <&pm8941_s1>; - vdd_l5_l7-supply = <&pm8941_s2>; - vdd_l6_l12_l14_l15-supply = <&pm8941_s2>; - vdd_l9_l10_l17_l22-supply = <&vreg_boost>; - vdd_l13_l20_l23_l24-supply = <&vreg_boost>; - vdd_l21-supply = <&vreg_boost>; - - pm8941_s1: s1 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - regulator-boot-on; - }; - - pm8941_s2: s2 { - regulator-min-microvolt = <2150000>; - regulator-max-microvolt = <2150000>; - regulator-boot-on; - }; - - pm8941_s3: s3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-system-load = <154000>; - regulator-always-on; - regulator-boot-on; - }; - - pm8941_s4: s4 { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - pm8941_l1: l1 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - regulator-always-on; - regulator-boot-on; - }; - - pm8941_l2: l2 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - pm8941_l3: l3 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - pm8941_l4: l4 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - }; - - pm8941_l5: l5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pm8941_l6: l6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - }; - - pm8941_l7: l7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - }; - - pm8941_l8: l8 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pm8941_l9: l9 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - }; - pm8941_l11: l11 { regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1350000>; }; - pm8941_l12: l12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - pm8941_l13: l13 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - regulator-boot-on; - }; - - pm8941_l14: l14 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pm8941_l15: l15 { - regulator-min-microvolt = <2050000>; - regulator-max-microvolt = <2050000>; - }; - - pm8941_l16: l16 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - }; - - pm8941_l17: l17 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - }; - - pm8941_l18: l18 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - }; - pm8941_l19: l19 { regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; }; - - pm8941_l20: l20 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-system-load = <500000>; - regulator-allow-set-load; - regulator-boot-on; - }; - - pm8941_l21: l21 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-boot-on; - }; - - pm8941_l22: l22 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - pm8941_l23: l23 { - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - pm8941_l24: l24 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3075000>; - regulator-boot-on; - }; - - pm8941_lvs3: lvs3 {}; - }; -}; - -&sdhc_1 { - status = "okay"; - - vmmc-supply = <&pm8941_l20>; - vqmmc-supply = <&pm8941_s3>; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_on>; - pinctrl-1 = <&sdc1_off>; -}; - -&sdhc_2 { - status = "okay"; - - vmmc-supply = <&pm8941_l21>; - vqmmc-supply = <&pm8941_l13>; - - cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_on>; - pinctrl-1 = <&sdc2_off>; -}; - -&sdhc_3 { - status = "okay"; - - max-frequency = <100000000>; - vmmc-supply = <&vreg_wlan>; - non-removable; - - pinctrl-names = "default"; - pinctrl-0 = <&sdc3_on>; - - #address-cells = <1>; - #size-cells = <0>; - - bcrmf@1 { - compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac"; - reg = <1>; - - brcm,drive-strength = <10>; - - pinctrl-names = "default"; - pinctrl-0 = <&wlan_sleep_clk_pin>; }; }; @@ -591,75 +147,13 @@ status = "okay"; }; -&tlmm { - lcd_backlight_en_pin_a: lcd-backlight-vddio-state { - pins = "gpio69"; - function = "gpio"; - drive-strength = <10>; - output-low; - bias-disable; - }; - - sdc1_on: sdc1-on-state { - clk-pins { - pins = "sdc1_clk"; - drive-strength = <16>; - bias-disable; - }; - - cmd-data-pins { - pins = "sdc1_cmd", "sdc1_data"; - drive-strength = <10>; - bias-pull-up; - }; - }; - - sdc2_on: sdc2-on-state { - clk-pins { - pins = "sdc2_clk"; - drive-strength = <6>; - bias-disable; - }; - - cmd-data-pins { - pins = "sdc2_cmd", "sdc2_data"; - drive-strength = <6>; - bias-pull-up; - }; - - cd-pins { - pins = "gpio62"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - }; - - sdc3_on: sdc3-on-state { - clk-pins { - pins = "gpio40"; - function = "sdc3"; - drive-strength = <10>; - bias-disable; - }; - - cmd-pins { - pins = "gpio39"; - function = "sdc3"; - drive-strength = <10>; - bias-pull-up; - }; - - data-pins { - pins = "gpio35", "gpio36", "gpio37", "gpio38"; - function = "sdc3"; - drive-strength = <10>; - bias-pull-up; - }; - }; +&synaptics_touchscreen { + vio-supply = <&pm8941_lvs3>; +}; - ts_int_pin: ts-int-pin-state { - pins = "gpio86"; +&tlmm { + bt_dev_wake_pin: bt-dev-wake-state { + pins = "gpio96"; function = "gpio"; drive-strength = <2>; bias-disable; @@ -673,33 +167,11 @@ output-low; }; - bt_dev_wake_pin: bt-dev-wake-state { - pins = "gpio96"; + lcd_backlight_en_pin_a: lcd-backlight-vddio-state { + pins = "gpio69"; function = "gpio"; - drive-strength = <2>; + drive-strength = <10>; + output-low; bias-disable; }; }; - -&usb { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - extcon = <&smbb>, <&usb_id>; - vbus-supply = <&chg_otg>; - - hnp-disable; - srp-disable; - adp-disable; -}; - -&usb_hs1_phy { - status = "okay"; - - v1p8-supply = <&pm8941_l6>; - v3p3-supply = <&pm8941_l24>; - - extcon = <&smbb>; - qcom,init-seq = /bits/ 8 <0x1 0x64>; -}; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi new file mode 100644 index 000000000000..e129bb1bd6ec --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi @@ -0,0 +1,539 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974pro.dtsi" +#include "pm8841.dtsi" +#include "pm8941.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> + +/ { + aliases { + mmc0 = &sdhc_1; + mmc1 = &sdhc_2; + serial0 = &blsp1_uart2; + serial1 = &blsp2_uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&gpio_keys_pin_a>; + pinctrl-names = "default"; + + key-volume-down { + label = "volume_down"; + gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEDOWN>; + debounce-interval = <15>; + }; + + key-volume-up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + }; + }; + + vreg_vsp: lcd-dcdc-regulator { + compatible = "regulator-fixed"; + regulator-name = "vreg_vsp"; + regulator-min-microvolt = <5600000>; + regulator-max-microvolt = <5600000>; + + gpio = <&pm8941_gpios 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&lcd_dcdc_en_pin_a>; + pinctrl-names = "default"; + }; + + vreg_boost: vreg-boost { + compatible = "regulator-fixed"; + + regulator-name = "vreg-boost"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + + regulator-always-on; + regulator-boot-on; + + gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&boost_bypass_n_pin>; + }; + + vreg_vph_pwr: vreg-vph-pwr { + compatible = "regulator-fixed"; + regulator-name = "vph-pwr"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + + regulator-always-on; + }; + + vreg_wlan: wlan-regulator { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pm8941_gpios 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&wlan_regulator_pin>; + pinctrl-names = "default"; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&blsp2_i2c2 { + clock-frequency = <355000>; + + status = "okay"; + + synaptics_touchscreen: synaptics@2c { + compatible = "syna,rmi4-i2c"; + reg = <0x2c>; + + interrupt-parent = <&tlmm>; + interrupts = <86 IRQ_TYPE_EDGE_FALLING>; + + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&pm8941_l22>; + /* vio-supply is set in dts */ + + pinctrl-0 = <&ts_int_pin>; + pinctrl-names = "default"; + + syna,startup-delay-ms = <100>; + + rmi4-f01@1 { + reg = <0x1>; + syna,nosleep-mode = <1>; + }; + + rmi4-f11@11 { + reg = <0x11>; + syna,sensor-type = <1>; + touchscreen-inverted-x; + }; + }; +}; + +&pm8941_coincell { + qcom,rset-ohms = <2100>; + qcom,vset-millivolts = <3000>; + + status = "okay"; +}; + +&pm8941_gpios { + gpio_keys_pin_a: gpio-keys-active-state { + pins = "gpio2", "gpio5"; + function = "normal"; + bias-pull-up; + power-source = <PM8941_GPIO_S3>; + }; + + wlan_sleep_clk_pin: wl-sleep-clk-state { + pins = "gpio17"; + function = "func2"; + output-high; + power-source = <PM8941_GPIO_S3>; + }; + + wlan_regulator_pin: wl-reg-active-state { + pins = "gpio18"; + function = "normal"; + bias-disable; + power-source = <PM8941_GPIO_S3>; + }; + + lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state { + pins = "gpio20"; + function = "normal"; + bias-disable; + power-source = <PM8941_GPIO_S3>; + input-disable; + output-low; + }; +}; + +&pm8941_lpg { + qcom,power-source = <1>; + + status = "okay"; + + multi-led { + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@5 { + reg = <5>; + color = <LED_COLOR_ID_BLUE>; + }; + + led@6 { + reg = <6>; + color = <LED_COLOR_ID_GREEN>; + }; + + led@7 { + reg = <7>; + color = <LED_COLOR_ID_RED>; + }; + }; +}; + +&pm8941_vib { + status = "okay"; +}; + +&remoteproc_adsp { + cx-supply = <&pm8841_s2>; + status = "okay"; +}; + +&remoteproc_mss { + cx-supply = <&pm8841_s2>; + mss-supply = <&pm8841_s3>; + mx-supply = <&pm8841_s1>; + pll-supply = <&pm8941_l12>; + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm8841-regulators"; + + pm8841_s1: s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s2: s2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s3: s3 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s4: s4 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm8941-regulators"; + + vdd_l1_l3-supply = <&pm8941_s1>; + vdd_l2_lvs1_2_3-supply = <&pm8941_s3>; + vdd_l4_l11-supply = <&pm8941_s1>; + vdd_l5_l7-supply = <&pm8941_s2>; + vdd_l6_l12_l14_l15-supply = <&pm8941_s2>; + vdd_l9_l10_l17_l22-supply = <&vreg_boost>; + vdd_l13_l20_l23_l24-supply = <&vreg_boost>; + vdd_l21-supply = <&vreg_boost>; + + pm8941_s1: s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_s2: s2 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + regulator-boot-on; + }; + + pm8941_s3: s3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-system-load = <154000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_s4: s4 { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + pm8941_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l3: l3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l4: l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8941_l5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + pm8941_l7: l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + pm8941_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l9: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8941_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_l13: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-boot-on; + }; + + pm8941_l14: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l15: l15 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8941_l16: l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + pm8941_l17: l17 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + pm8941_l18: l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8941_l20: l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <500000>; + regulator-allow-set-load; + regulator-boot-on; + }; + + pm8941_l21: l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-boot-on; + }; + + pm8941_l22: l22 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + pm8941_l23: l23 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + pm8941_l24: l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + regulator-boot-on; + }; + + pm8941_lvs3: lvs3 {}; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8941_l20>; + vqmmc-supply = <&pm8941_s3>; + + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; + pinctrl-names = "default", "sleep"; + + status = "okay"; +}; + +&sdhc_2 { + vmmc-supply = <&pm8941_l21>; + vqmmc-supply = <&pm8941_l13>; + + cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + pinctrl-names = "default", "sleep"; + + status = "okay"; +}; + +&sdhc_3 { + max-frequency = <100000000>; + vmmc-supply = <&vreg_wlan>; + non-removable; + + pinctrl-0 = <&sdc3_on>; + pinctrl-names = "default"; + + status = "okay"; + + wifi@1 { + compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + brcm,drive-strength = <10>; + + pinctrl-0 = <&wlan_sleep_clk_pin>; + pinctrl-names = "default"; + }; +}; + +&tlmm { + sdc1_on: sdc1-on-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + sdc2_on: sdc2-on-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <6>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc2_cmd", "sdc2_data"; + drive-strength = <6>; + bias-pull-up; + }; + + cd-pins { + pins = "gpio62"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; + + sdc3_on: sdc3-on-state { + clk-pins { + pins = "gpio40"; + function = "sdc3"; + drive-strength = <10>; + bias-disable; + }; + + cmd-pins { + pins = "gpio39"; + function = "sdc3"; + drive-strength = <10>; + bias-pull-up; + }; + + data-pins { + pins = "gpio35", "gpio36", "gpio37", "gpio38"; + function = "sdc3"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + ts_int_pin: ts-int-pin-state { + pins = "gpio86"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&usb { + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + + hnp-disable; + srp-disable; + adp-disable; + + status = "okay"; +}; + +&usb_hs1_phy { + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x64>; + + status = "okay"; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts new file mode 100644 index 000000000000..1ed6e1cc21d5 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-leo.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi" + +/ { + model = "Sony Xperia Z3"; + compatible = "sony,xperia-leo", "qcom,msm8974pro", "qcom,msm8974"; + chassis-type = "handset"; + + gpio-keys { + key-camera-snapshot { + label = "camera_snapshot"; + gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_CAMERA>; + debounce-interval = <15>; + }; + + key-camera-focus { + label = "camera_focus"; + gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>; + linux,code = <KEY_CAMERA_FOCUS>; + debounce-interval = <15>; + }; + }; +}; + +&gpio_keys_pin_a { + pins = "gpio2", "gpio3", "gpio4", "gpio5"; +}; + +&smbb { + usb-charge-current-limit = <1500000>; + qcom,fast-charge-safe-current = <3000000>; + qcom,fast-charge-current-limit = <2150000>; + qcom,fast-charge-safe-voltage = <4400000>; + qcom,fast-charge-high-threshold-voltage = <4350000>; + qcom,auto-recharge-threshold-voltage = <4280000>; + qcom,minimum-input-voltage = <4200000>; + + status = "okay"; +}; + +&synaptics_touchscreen { + vio-supply = <&pm8941_s3>; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi index edc9aaf828c8..68fa5859d263 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi @@ -378,6 +378,16 @@ phy-names = "pciephy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie_ep: pcie-ep@1c00000 { diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/renesas/r7s72100.dtsi index e6d8da6faffb..08ea4c551ed0 100644 --- a/arch/arm/boot/dts/renesas/r7s72100.dtsi +++ b/arch/arm/boot/dts/renesas/r7s72100.dtsi @@ -125,6 +125,7 @@ <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -138,6 +139,7 @@ <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -151,6 +153,7 @@ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -164,6 +167,7 @@ <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -177,6 +181,7 @@ <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -190,6 +195,7 @@ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -203,6 +209,7 @@ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -216,6 +223,7 @@ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "bri"; clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; clock-names = "fck"; power-domains = <&cpg_clocks>; diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi index ac654ff45d0e..9a2ae282a46b 100644 --- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi +++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi @@ -60,6 +60,32 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a73a4", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&mstp1_clks R8A73A4_CLK_TMU0>; + clock-names = "fck"; + power-domains = <&pd_c5>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a73a4", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&mstp1_clks R8A73A4_CLK_TMU3>; + clock-names = "fck"; + power-domains = <&pd_a3r>; + status = "disabled"; + }; + dbsc1: memory-controller@e6790000 { compatible = "renesas,dbsc-r8a73a4"; reg = <0 0xe6790000 0 0x10000>; @@ -654,6 +680,17 @@ }; /* Gate clocks */ + mstp1_clks: mstp1_clks@e6150134 { + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; + clocks = <&cp_clk>, <&mp_clk>; + #clock-cells = <1>; + clock-indices = < + R8A73A4_CLK_TMU0 R8A73A4_CLK_TMU3 + >; + clock-output-names = + "tmu0", "tmu3"; + }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; diff --git a/arch/arm/boot/dts/renesas/r8a7742.dtsi b/arch/arm/boot/dts/renesas/r8a7742.dtsi index 16d146db824a..d55c344c1cd2 100644 --- a/arch/arm/boot/dts/renesas/r8a7742.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7742.dtsi @@ -404,6 +404,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7742", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7742", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7742", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7742", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + thermal: thermal@e61f0000 { compatible = "renesas,thermal-r8a7742", "renesas,rcar-gen2-thermal"; diff --git a/arch/arm/boot/dts/renesas/r8a7743.dtsi b/arch/arm/boot/dts/renesas/r8a7743.dtsi index 2245d19a23bb..d917c0a971f5 100644 --- a/arch/arm/boot/dts/renesas/r8a7743.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7743.dtsi @@ -329,6 +329,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7743", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7743", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7743", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7743", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + thermal: thermal@e61f0000 { compatible = "renesas,thermal-r8a7743", "renesas,rcar-gen2-thermal"; diff --git a/arch/arm/boot/dts/renesas/r8a7744.dtsi b/arch/arm/boot/dts/renesas/r8a7744.dtsi index aa13841f9781..754859c38a93 100644 --- a/arch/arm/boot/dts/renesas/r8a7744.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7744.dtsi @@ -329,6 +329,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7744", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7744", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7744", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7744", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + thermal: thermal@e61f0000 { compatible = "renesas,thermal-r8a7744", "renesas,rcar-gen2-thermal"; diff --git a/arch/arm/boot/dts/renesas/r8a7745.dtsi b/arch/arm/boot/dts/renesas/r8a7745.dtsi index 44688b8431c3..168298300490 100644 --- a/arch/arm/boot/dts/renesas/r8a7745.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7745.dtsi @@ -304,6 +304,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7745", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7745", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7745", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7745", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + ipmmu_sy0: iommu@e6280000 { compatible = "renesas,ipmmu-r8a7745", "renesas,ipmmu-vmsa"; diff --git a/arch/arm/boot/dts/renesas/r8a77470.dtsi b/arch/arm/boot/dts/renesas/r8a77470.dtsi index a5cf663a0118..2375438d83c9 100644 --- a/arch/arm/boot/dts/renesas/r8a77470.dtsi +++ b/arch/arm/boot/dts/renesas/r8a77470.dtsi @@ -241,6 +241,50 @@ resets = <&cpg 407>; }; + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a77470", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a77470", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a77470", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi index 46fb81f5062f..583b74a9f071 100644 --- a/arch/arm/boot/dts/renesas/r8a7790.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi @@ -434,6 +434,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7790", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7790", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7790", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7790", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + thermal: thermal@e61f0000 { compatible = "renesas,thermal-r8a7790", "renesas,rcar-gen2-thermal", diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi index b9d34147628e..de08ceb62230 100644 --- a/arch/arm/boot/dts/renesas/r8a7791.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi @@ -351,6 +351,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7791", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7791", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7791", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7791", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + thermal: thermal@e61f0000 { compatible = "renesas,thermal-r8a7791", "renesas,rcar-gen2-thermal", diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi index ecfab3ff59e8..7defeb8e4cd1 100644 --- a/arch/arm/boot/dts/renesas/r8a7792.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi @@ -351,6 +351,65 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7792", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7792", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7792", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7792", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi index f51bf687f4bd..d32a9d5d3faa 100644 --- a/arch/arm/boot/dts/renesas/r8a7793.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi @@ -326,6 +326,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7793", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7793", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7793", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7793", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + thermal: thermal@e61f0000 { compatible = "renesas,thermal-r8a7793", "renesas,rcar-gen2-thermal", diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi index 371dd4715dde..f37f094cecc8 100644 --- a/arch/arm/boot/dts/renesas/r8a7794.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi @@ -292,6 +292,64 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a7794", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@fff60000 { + compatible = "renesas,tmu-r8a7794", "renesas,tmu"; + reg = <0 0xfff60000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 111>; + clock-names = "fck"; + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; + resets = <&cpg 111>; + status = "disabled"; + }; + + tmu2: timer@fff70000 { + compatible = "renesas,tmu-r8a7794", "renesas,tmu"; + reg = <0 0xfff70000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu3: timer@fff80000 { + compatible = "renesas,tmu-r8a7794", "renesas,tmu"; + reg = <0 0xfff80000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tuni0", "tuni1", "tuni2"; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + ipmmu_sy0: iommu@e6280000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi index fa63e1afc4ef..45f60eeeaaa1 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -319,7 +319,6 @@ gmac2: ethernet@44002000 { compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac"; reg = <0x44002000 0x2000>; - interrupt-parent = <&gic>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/samsung/exynos3250.dtsi b/arch/arm/boot/dts/samsung/exynos3250.dtsi index 3f1015edab43..b6c3826a9424 100644 --- a/arch/arm/boot/dts/samsung/exynos3250.dtsi +++ b/arch/arm/boot/dts/samsung/exynos3250.dtsi @@ -826,6 +826,7 @@ samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; + fifo-depth = <256>; status = "disabled"; }; @@ -842,6 +843,7 @@ samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; + fifo-depth = <64>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/samsung/exynos4.dtsi b/arch/arm/boot/dts/samsung/exynos4.dtsi index 7f981b5c0d64..ed47d0ce04e1 100644 --- a/arch/arm/boot/dts/samsung/exynos4.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4.dtsi @@ -621,6 +621,7 @@ clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; + fifo-depth = <256>; status = "disabled"; }; @@ -636,6 +637,7 @@ clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; + fifo-depth = <64>; status = "disabled"; }; @@ -651,6 +653,7 @@ clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; + fifo-depth = <64>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts b/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts index b566f878ed84..18f4f494093b 100644 --- a/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts @@ -88,7 +88,7 @@ &keypad { samsung,keypad-num-rows = <2>; samsung,keypad-num-columns = <8>; - linux,keypad-no-autorepeat; + linux,input-no-autorepeat; wakeup-source; pinctrl-names = "default"; pinctrl-0 = <&keypad_rows &keypad_cols>; diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi index e5254e32aa8f..9bc05961577d 100644 --- a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi @@ -45,6 +45,12 @@ /* Default S-BOOT bootloader loads initramfs here */ linux,initrd-start = <0x42000000>; linux,initrd-end = <0x42800000>; + + /* + * Stock bootloader provides incorrect memory size in ATAG_MEM; + * override it here + */ + linux,usable-memory-range = <0x40000000 0x3fc00000>; }; firmware@204f000 { diff --git a/arch/arm/boot/dts/samsung/exynos4412-origen.dts b/arch/arm/boot/dts/samsung/exynos4412-origen.dts index 23b151645d66..10ab7bc90f50 100644 --- a/arch/arm/boot/dts/samsung/exynos4412-origen.dts +++ b/arch/arm/boot/dts/samsung/exynos4412-origen.dts @@ -453,7 +453,7 @@ &keypad { samsung,keypad-num-rows = <3>; samsung,keypad-num-columns = <2>; - linux,keypad-no-autorepeat; + linux,input-no-autorepeat; wakeup-source; pinctrl-0 = <&keypad_rows &keypad_cols>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts b/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts index 715dfcba1417..c83fb250e664 100644 --- a/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts @@ -69,7 +69,7 @@ &keypad { samsung,keypad-num-rows = <3>; samsung,keypad-num-columns = <8>; - linux,keypad-no-autorepeat; + linux,input-no-autorepeat; wakeup-source; pinctrl-0 = <&keypad_rows &keypad_cols>; pinctrl-names = "default"; @@ -105,31 +105,31 @@ linux,code = <6>; }; - key-A { + key-a { keypad,row = <2>; keypad,column = <6>; linux,code = <30>; }; - key-B { + key-b { keypad,row = <2>; keypad,column = <7>; linux,code = <48>; }; - key-C { + key-c { keypad,row = <0>; keypad,column = <5>; linux,code = <46>; }; - key-D { + key-d { keypad,row = <2>; keypad,column = <5>; linux,code = <32>; }; - key-E { + key-e { keypad,row = <0>; keypad,column = <7>; linux,code = <18>; diff --git a/arch/arm/boot/dts/samsung/exynos5250.dtsi b/arch/arm/boot/dts/samsung/exynos5250.dtsi index 99c84bebf25a..b9e7c4938818 100644 --- a/arch/arm/boot/dts/samsung/exynos5250.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5250.dtsi @@ -511,6 +511,7 @@ clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; + fifo-depth = <256>; }; spi_1: spi@12d30000 { @@ -526,6 +527,7 @@ clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; + fifo-depth = <64>; }; spi_2: spi@12d40000 { @@ -541,6 +543,7 @@ clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; + fifo-depth = <64>; }; mmc_0: mmc@12200000 { diff --git a/arch/arm/boot/dts/samsung/exynos5420.dtsi b/arch/arm/boot/dts/samsung/exynos5420.dtsi index 25ed90374679..196c6d04675a 100644 --- a/arch/arm/boot/dts/samsung/exynos5420.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5420.dtsi @@ -658,6 +658,7 @@ pinctrl-0 = <&spi0_bus>; clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; clock-names = "spi", "spi_busclk0"; + fifo-depth = <256>; status = "disabled"; }; @@ -674,6 +675,7 @@ pinctrl-0 = <&spi1_bus>; clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; clock-names = "spi", "spi_busclk0"; + fifo-depth = <64>; status = "disabled"; }; @@ -690,6 +692,7 @@ pinctrl-0 = <&spi2_bus>; clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; clock-names = "spi", "spi_busclk0"; + fifo-depth = <64>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts index 9bbbdce9103a..bb019868b996 100644 --- a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts @@ -185,7 +185,7 @@ samsung,color-depth = <1>; samsung,link-rate = <0x0a>; samsung,lane-count = <2>; - samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>; + hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>; ports { port { diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi index ed560c9a3aa1..34e8a3d5efa5 100644 --- a/arch/arm/boot/dts/samsung/s5pv210.dtsi +++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi @@ -72,7 +72,7 @@ #size-cells = <1>; ranges; - onenand: onenand@b0600000 { + onenand: nand-controller@b0600000 { compatible = "samsung,s5pv210-onenand"; reg = <0xb0600000 0x2000>, <0xb0000000 0x20000>, @@ -82,7 +82,7 @@ clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; clock-names = "bus", "onenand"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -161,6 +161,7 @@ pinctrl-0 = <&spi0_bus>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <256>; status = "disabled"; }; @@ -177,6 +178,7 @@ pinctrl-0 = <&spi1_bus>; #address-cells = <1>; #size-cells = <0>; + fifo-depth = <64>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index 65c72b6fcc83..2537b3d47e6f 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -257,23 +257,6 @@ status = "disabled"; }; - can3: can@40003400 { - compatible = "st,stm32f4-bxcan"; - reg = <0x40003400 0x200>; - interrupts = <104>, <105>, <106>, <107>; - interrupt-names = "tx", "rx0", "rx1", "sce"; - resets = <&rcc STM32F7_APB1_RESET(CAN3)>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; - st,gcan = <&gcan3>; - status = "disabled"; - }; - - gcan3: gcan@40003600 { - compatible = "st,stm32f4-gcan", "syscon"; - reg = <0x40003600 0x200>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; - }; - spi2: spi@40003800 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/st/stm32f769.dtsi b/arch/arm/boot/dts/st/stm32f769.dtsi index 4e7d9032149c..e8cbb99e81a6 100644 --- a/arch/arm/boot/dts/st/stm32f769.dtsi +++ b/arch/arm/boot/dts/st/stm32f769.dtsi @@ -7,6 +7,23 @@ / { soc { + can3: can@40003400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40003400 0x200>; + interrupts = <104>, <105>, <106>, <107>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + st,gcan = <&gcan3>; + status = "disabled"; + }; + + gcan3: gcan@40003600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40003600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + }; + dsi: dsi@40016c00 { compatible = "st,stm32-dsi"; reg = <0x40016c00 0x800>; diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 27e0c3826789..32c5d8a1e06a 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -47,6 +47,63 @@ }; }; + ltdc_pins_a: ltdc-0 { + pins { + pinmux = <STM32_PINMUX('D', 9, AF13)>, /* LCD_CLK */ + <STM32_PINMUX('C', 6, AF14)>, /* LCD_HSYNC */ + <STM32_PINMUX('G', 4, AF11)>, /* LCD_VSYNC */ + <STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */ + <STM32_PINMUX('G', 7, AF14)>, /* LCD_R2 */ + <STM32_PINMUX('B', 12, AF13)>, /* LCD_R3 */ + <STM32_PINMUX('D', 14, AF14)>, /* LCD_R4 */ + <STM32_PINMUX('E', 7, AF14)>, /* LCD_R5 */ + <STM32_PINMUX('E', 13, AF14)>, /* LCD_R6 */ + <STM32_PINMUX('E', 9, AF14)>, /* LCD_R7 */ + <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ + <STM32_PINMUX('F', 3, AF14)>, /* LCD_G3 */ + <STM32_PINMUX('D', 5, AF14)>, /* LCD_G4 */ + <STM32_PINMUX('G', 0, AF14)>, /* LCD_G5 */ + <STM32_PINMUX('C', 7, AF14)>, /* LCD_G6 */ + <STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */ + <STM32_PINMUX('D', 10, AF14)>, /* LCD_B2 */ + <STM32_PINMUX('F', 2, AF14)>, /* LCD_B3 */ + <STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */ + <STM32_PINMUX('E', 0, AF14)>, /* LCD_B5 */ + <STM32_PINMUX('B', 6, AF7)>, /* LCD_B6 */ + <STM32_PINMUX('F', 1, AF13)>; /* LCD_B7 */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + }; + + ltdc_sleep_pins_a: ltdc-sleep-0 { + pins { + pinmux = <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_CLK */ + <STM32_PINMUX('C', 6, ANALOG)>, /* LCD_HSYNC */ + <STM32_PINMUX('G', 4, ANALOG)>, /* LCD_VSYNC */ + <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_DE */ + <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_R2 */ + <STM32_PINMUX('B', 12, ANALOG)>, /* LCD_R3 */ + <STM32_PINMUX('D', 14, ANALOG)>, /* LCD_R4 */ + <STM32_PINMUX('E', 7, ANALOG)>, /* LCD_R5 */ + <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_R6 */ + <STM32_PINMUX('E', 9, ANALOG)>, /* LCD_R7 */ + <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ + <STM32_PINMUX('F', 3, ANALOG)>, /* LCD_G3 */ + <STM32_PINMUX('D', 5, ANALOG)>, /* LCD_G4 */ + <STM32_PINMUX('G', 0, ANALOG)>, /* LCD_G5 */ + <STM32_PINMUX('C', 7, ANALOG)>, /* LCD_G6 */ + <STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */ + <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B2 */ + <STM32_PINMUX('F', 2, ANALOG)>, /* LCD_B3 */ + <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */ + <STM32_PINMUX('E', 0, ANALOG)>, /* LCD_B5 */ + <STM32_PINMUX('B', 6, ANALOG)>, /* LCD_B6 */ + <STM32_PINMUX('F', 1, ANALOG)>; /* LCD_B7 */ + }; + }; + mcp23017_pins_a: mcp23017-0 { pins { pinmux = <STM32_PINMUX('G', 12, GPIO)>; diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index 3900f32da797..ecfa120827ba 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -745,340 +745,6 @@ dma-channels = <16>; }; - adc_2: adc@48004000 { - compatible = "st,stm32mp13-adc-core"; - reg = <0x48004000 0x400>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc ADC2>, <&rcc ADC2_K>; - clock-names = "bus", "adc"; - interrupt-controller; - #interrupt-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - adc2: adc@0 { - compatible = "st,stm32mp13-adc"; - #io-channel-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0>; - interrupt-parent = <&adc_2>; - interrupts = <0>; - dmas = <&dmamux1 10 0x400 0x80000001>; - dma-names = "rx"; - status = "disabled"; - - channel@13 { - reg = <13>; - label = "vrefint"; - }; - channel@14 { - reg = <14>; - label = "vddcore"; - }; - channel@16 { - reg = <16>; - label = "vddcpu"; - }; - channel@17 { - reg = <17>; - label = "vddq_ddr"; - }; - }; - }; - - usbotg_hs: usb@49000000 { - compatible = "st,stm32mp15-hsotg", "snps,dwc2"; - reg = <0x49000000 0x40000>; - clocks = <&rcc USBO_K>; - clock-names = "otg"; - resets = <&rcc USBO_R>; - reset-names = "dwc2"; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - g-rx-fifo-size = <512>; - g-np-tx-fifo-size = <32>; - g-tx-fifo-size = <256 16 16 16 16 16 16 16>; - dr_mode = "otg"; - otg-rev = <0x200>; - usb33d-supply = <&scmi_usb33>; - status = "disabled"; - }; - - usart1: serial@4c000000 { - compatible = "st,stm32h7-uart"; - reg = <0x4c000000 0x400>; - interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc USART1_K>; - resets = <&rcc USART1_R>; - wakeup-source; - dmas = <&dmamux1 41 0x400 0x5>, - <&dmamux1 42 0x400 0x1>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - usart2: serial@4c001000 { - compatible = "st,stm32h7-uart"; - reg = <0x4c001000 0x400>; - interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc USART2_K>; - resets = <&rcc USART2_R>; - wakeup-source; - dmas = <&dmamux1 43 0x400 0x5>, - <&dmamux1 44 0x400 0x1>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2s4: audio-controller@4c002000 { - compatible = "st,stm32h7-i2s"; - reg = <0x4c002000 0x400>; - #sound-dai-cells = <0>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 83 0x400 0x01>, - <&dmamux1 84 0x400 0x01>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spi4: spi@4c002000 { - compatible = "st,stm32h7-spi"; - reg = <0x4c002000 0x400>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI4_K>; - resets = <&rcc SPI4_R>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmamux1 83 0x400 0x01>, - <&dmamux1 84 0x400 0x01>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spi5: spi@4c003000 { - compatible = "st,stm32h7-spi"; - reg = <0x4c003000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI5_K>; - resets = <&rcc SPI5_R>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmamux1 85 0x400 0x01>, - <&dmamux1 86 0x400 0x01>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2c3: i2c@4c004000 { - compatible = "st,stm32mp13-i2c"; - reg = <0x4c004000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C3_K>; - resets = <&rcc I2C3_R>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmamux1 73 0x400 0x1>, - <&dmamux1 74 0x400 0x1>; - dma-names = "rx", "tx"; - st,syscfg-fmp = <&syscfg 0x4 0x4>; - i2c-analog-filter; - status = "disabled"; - }; - - i2c4: i2c@4c005000 { - compatible = "st,stm32mp13-i2c"; - reg = <0x4c005000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C4_K>; - resets = <&rcc I2C4_R>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmamux1 75 0x400 0x1>, - <&dmamux1 76 0x400 0x1>; - dma-names = "rx", "tx"; - st,syscfg-fmp = <&syscfg 0x4 0x8>; - i2c-analog-filter; - status = "disabled"; - }; - - i2c5: i2c@4c006000 { - compatible = "st,stm32mp13-i2c"; - reg = <0x4c006000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C5_K>; - resets = <&rcc I2C5_R>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmamux1 115 0x400 0x1>, - <&dmamux1 116 0x400 0x1>; - dma-names = "rx", "tx"; - st,syscfg-fmp = <&syscfg 0x4 0x10>; - i2c-analog-filter; - status = "disabled"; - }; - - timers12: timer@4c007000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x4c007000 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM12_K>; - clock-names = "int"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@11 { - compatible = "st,stm32h7-timer-trigger"; - reg = <11>; - status = "disabled"; - }; - }; - - timers13: timer@4c008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x4c008000 0x400>; - interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM13_K>; - clock-names = "int"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@12 { - compatible = "st,stm32h7-timer-trigger"; - reg = <12>; - status = "disabled"; - }; - }; - - timers14: timer@4c009000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x4c009000 0x400>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM14_K>; - clock-names = "int"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@13 { - compatible = "st,stm32h7-timer-trigger"; - reg = <13>; - status = "disabled"; - }; - }; - - timers15: timer@4c00a000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x4c00a000 0x400>; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM15_K>; - clock-names = "int"; - dmas = <&dmamux1 105 0x400 0x1>, - <&dmamux1 106 0x400 0x1>, - <&dmamux1 107 0x400 0x1>, - <&dmamux1 108 0x400 0x1>; - dma-names = "ch1", "up", "trig", "com"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@14 { - compatible = "st,stm32h7-timer-trigger"; - reg = <14>; - status = "disabled"; - }; - }; - - timers16: timer@4c00b000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x4c00b000 0x400>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM16_K>; - clock-names = "int"; - dmas = <&dmamux1 109 0x400 0x1>, - <&dmamux1 110 0x400 0x1>; - dma-names = "ch1", "up"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@15 { - compatible = "st,stm32h7-timer-trigger"; - reg = <15>; - status = "disabled"; - }; - }; - - timers17: timer@4c00c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x4c00c000 0x400>; - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM17_K>; - clock-names = "int"; - dmas = <&dmamux1 111 0x400 0x1>, - <&dmamux1 112 0x400 0x1>; - dma-names = "ch1", "up"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@16 { - compatible = "st,stm32h7-timer-trigger"; - reg = <16>; - status = "disabled"; - }; - }; - rcc: rcc@50000000 { compatible = "st,stm32mp13-rcc", "syscon"; reg = <0x50000000 0x1000>; @@ -1092,6 +758,30 @@ <&scmi_clk CK_SCMI_LSI>; }; + pwr_regulators: pwr@50001000 { + compatible = "st,stm32mp1,pwr-reg"; + reg = <0x50001000 0x10>; + status = "disabled"; + + reg11: reg11 { + regulator-name = "reg11"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + reg18: reg18 { + regulator-name = "reg18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + usb33: usb33 { + regulator-name = "usb33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; + exti: interrupt-controller@5000d000 { compatible = "st,stm32mp13-exti", "syscon"; interrupt-controller; @@ -1105,69 +795,6 @@ clocks = <&rcc SYSCFG>; }; - lptimer2: timer@50021000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-lptimer"; - reg = <0x50021000 0x400>; - interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM2_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - - trigger@1 { - compatible = "st,stm32-lptimer-trigger"; - reg = <1>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-lptimer-counter"; - status = "disabled"; - }; - - timer { - compatible = "st,stm32-lptimer-timer"; - status = "disabled"; - }; - }; - - lptimer3: timer@50022000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-lptimer"; - reg = <0x50022000 0x400>; - interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM3_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - - trigger@2 { - compatible = "st,stm32-lptimer-trigger"; - reg = <2>; - status = "disabled"; - }; - - timer { - compatible = "st,stm32-lptimer-timer"; - status = "disabled"; - }; - }; - lptimer4: timer@50023000 { compatible = "st,stm32-lptimer"; reg = <0x50023000 0x400>; @@ -1210,25 +837,6 @@ }; }; - hash: hash@54003000 { - compatible = "st,stm32mp13-hash"; - reg = <0x54003000 0x400>; - interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc HASH1>; - resets = <&rcc HASH1_R>; - dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>; - dma-names = "in"; - status = "disabled"; - }; - - rng: rng@54004000 { - compatible = "st,stm32mp13-rng"; - reg = <0x54004000 0x400>; - clocks = <&rcc RNG1_K>; - resets = <&rcc RNG1_R>; - status = "disabled"; - }; - mdma: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; @@ -1239,82 +847,6 @@ dma-requests = <48>; }; - fmc: memory-controller@58002000 { - compatible = "st,stm32mp1-fmc2-ebi"; - reg = <0x58002000 0x1000>; - ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ - <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ - <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ - <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ - <4 0 0x80000000 0x10000000>; /* NAND */ - #address-cells = <2>; - #size-cells = <1>; - clocks = <&rcc FMC_K>; - resets = <&rcc FMC_R>; - status = "disabled"; - - nand-controller@4,0 { - compatible = "st,stm32mp1-fmc2-nfc"; - reg = <4 0x00000000 0x1000>, - <4 0x08010000 0x1000>, - <4 0x08020000 0x1000>, - <4 0x01000000 0x1000>, - <4 0x09010000 0x1000>, - <4 0x09020000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, - <&mdma 24 0x2 0x12000a08 0x0 0x0>, - <&mdma 25 0x2 0x12000a0a 0x0 0x0>; - dma-names = "tx", "rx", "ecc"; - status = "disabled"; - }; - }; - - qspi: spi@58003000 { - compatible = "st,stm32f469-qspi"; - reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; - reg-names = "qspi", "qspi_mm"; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, - <&mdma 26 0x2 0x10100008 0x0 0x0>; - dma-names = "tx", "rx"; - clocks = <&rcc QSPI_K>; - resets = <&rcc QSPI_R>; - status = "disabled"; - }; - - sdmmc1: mmc@58005000 { - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x20253180>; - reg = <0x58005000 0x1000>, <0x58006000 0x1000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SDMMC1_K>; - clock-names = "apb_pclk"; - resets = <&rcc SDMMC1_R>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <130000000>; - status = "disabled"; - }; - - sdmmc2: mmc@58007000 { - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x20253180>; - reg = <0x58007000 0x1000>, <0x58008000 0x1000>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SDMMC2_K>; - clock-names = "apb_pclk"; - resets = <&rcc SDMMC2_R>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <130000000>; - status = "disabled"; - }; - crc1: crc@58009000 { compatible = "st,stm32f7-crc"; reg = <0x58009000 0x400>; @@ -1349,29 +881,6 @@ status = "disabled"; }; - usbphyc: usbphyc@5a006000 { - #address-cells = <1>; - #size-cells = <0>; - #clock-cells = <0>; - compatible = "st,stm32mp1-usbphyc"; - reg = <0x5a006000 0x1000>; - clocks = <&rcc USBPHY_K>; - resets = <&rcc USBPHY_R>; - vdda1v1-supply = <&scmi_reg11>; - vdda1v8-supply = <&scmi_reg18>; - status = "disabled"; - - usbphyc_port0: usb-phy@0 { - #phy-cells = <0>; - reg = <0>; - }; - - usbphyc_port1: usb-phy@1 { - #phy-cells = <1>; - reg = <1>; - }; - }; - rtc: rtc@5c004000 { compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; @@ -1400,6 +909,555 @@ }; }; + etzpc: bus@5c007000 { + compatible = "st,stm32-etzpc", "simple-bus"; + reg = <0x5c007000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + #access-controller-cells = <1>; + ranges; + + adc_2: adc@48004000 { + compatible = "st,stm32mp13-adc-core"; + reg = <0x48004000 0x400>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC2>, <&rcc ADC2_K>; + clock-names = "bus", "adc"; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + access-controllers = <&etzpc 33>; + status = "disabled"; + + adc2: adc@0 { + compatible = "st,stm32mp13-adc"; + #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + interrupt-parent = <&adc_2>; + interrupts = <0>; + dmas = <&dmamux1 10 0x400 0x80000001>; + dma-names = "rx"; + status = "disabled"; + + channel@13 { + reg = <13>; + label = "vrefint"; + }; + channel@14 { + reg = <14>; + label = "vddcore"; + }; + channel@16 { + reg = <16>; + label = "vddcpu"; + }; + channel@17 { + reg = <17>; + label = "vddq_ddr"; + }; + }; + }; + + usbotg_hs: usb@49000000 { + compatible = "st,stm32mp15-hsotg", "snps,dwc2"; + reg = <0x49000000 0x40000>; + clocks = <&rcc USBO_K>; + clock-names = "otg"; + resets = <&rcc USBO_R>; + reset-names = "dwc2"; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <32>; + g-tx-fifo-size = <256 16 16 16 16 16 16 16>; + dr_mode = "otg"; + otg-rev = <0x200>; + usb33d-supply = <&scmi_usb33>; + access-controllers = <&etzpc 34>; + status = "disabled"; + }; + + usart1: serial@4c000000 { + compatible = "st,stm32h7-uart"; + reg = <0x4c000000 0x400>; + interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART1_K>; + resets = <&rcc USART1_R>; + wakeup-source; + dmas = <&dmamux1 41 0x400 0x5>, + <&dmamux1 42 0x400 0x1>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 16>; + status = "disabled"; + }; + + usart2: serial@4c001000 { + compatible = "st,stm32h7-uart"; + reg = <0x4c001000 0x400>; + interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART2_K>; + resets = <&rcc USART2_R>; + wakeup-source; + dmas = <&dmamux1 43 0x400 0x5>, + <&dmamux1 44 0x400 0x1>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 17>; + status = "disabled"; + }; + + i2s4: audio-controller@4c002000 { + compatible = "st,stm32h7-i2s"; + reg = <0x4c002000 0x400>; + #sound-dai-cells = <0>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 83 0x400 0x01>, + <&dmamux1 84 0x400 0x01>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 13>; + status = "disabled"; + }; + + spi4: spi@4c002000 { + compatible = "st,stm32h7-spi"; + reg = <0x4c002000 0x400>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI4_K>; + resets = <&rcc SPI4_R>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmamux1 83 0x400 0x01>, + <&dmamux1 84 0x400 0x01>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 18>; + status = "disabled"; + }; + + spi5: spi@4c003000 { + compatible = "st,stm32h7-spi"; + reg = <0x4c003000 0x400>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI5_K>; + resets = <&rcc SPI5_R>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmamux1 85 0x400 0x01>, + <&dmamux1 86 0x400 0x01>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 19>; + status = "disabled"; + }; + + i2c3: i2c@4c004000 { + compatible = "st,stm32mp13-i2c"; + reg = <0x4c004000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C3_K>; + resets = <&rcc I2C3_R>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmamux1 73 0x400 0x1>, + <&dmamux1 74 0x400 0x1>; + dma-names = "rx", "tx"; + st,syscfg-fmp = <&syscfg 0x4 0x4>; + i2c-analog-filter; + access-controllers = <&etzpc 20>; + status = "disabled"; + }; + + i2c4: i2c@4c005000 { + compatible = "st,stm32mp13-i2c"; + reg = <0x4c005000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C4_K>; + resets = <&rcc I2C4_R>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmamux1 75 0x400 0x1>, + <&dmamux1 76 0x400 0x1>; + dma-names = "rx", "tx"; + st,syscfg-fmp = <&syscfg 0x4 0x8>; + i2c-analog-filter; + access-controllers = <&etzpc 21>; + status = "disabled"; + }; + + i2c5: i2c@4c006000 { + compatible = "st,stm32mp13-i2c"; + reg = <0x4c006000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C5_K>; + resets = <&rcc I2C5_R>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmamux1 115 0x400 0x1>, + <&dmamux1 116 0x400 0x1>; + dma-names = "rx", "tx"; + st,syscfg-fmp = <&syscfg 0x4 0x10>; + i2c-analog-filter; + access-controllers = <&etzpc 22>; + status = "disabled"; + }; + + timers12: timer@4c007000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x4c007000 0x400>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM12_K>; + clock-names = "int"; + access-controllers = <&etzpc 23>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@11 { + compatible = "st,stm32h7-timer-trigger"; + reg = <11>; + status = "disabled"; + }; + }; + + timers13: timer@4c008000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x4c008000 0x400>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM13_K>; + clock-names = "int"; + access-controllers = <&etzpc 24>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@12 { + compatible = "st,stm32h7-timer-trigger"; + reg = <12>; + status = "disabled"; + }; + }; + + timers14: timer@4c009000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x4c009000 0x400>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM14_K>; + clock-names = "int"; + access-controllers = <&etzpc 25>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@13 { + compatible = "st,stm32h7-timer-trigger"; + reg = <13>; + status = "disabled"; + }; + }; + + timers15: timer@4c00a000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x4c00a000 0x400>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM15_K>; + clock-names = "int"; + dmas = <&dmamux1 105 0x400 0x1>, + <&dmamux1 106 0x400 0x1>, + <&dmamux1 107 0x400 0x1>, + <&dmamux1 108 0x400 0x1>; + dma-names = "ch1", "up", "trig", "com"; + access-controllers = <&etzpc 26>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@14 { + compatible = "st,stm32h7-timer-trigger"; + reg = <14>; + status = "disabled"; + }; + }; + + timers16: timer@4c00b000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x4c00b000 0x400>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM16_K>; + clock-names = "int"; + dmas = <&dmamux1 109 0x400 0x1>, + <&dmamux1 110 0x400 0x1>; + dma-names = "ch1", "up"; + access-controllers = <&etzpc 27>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@15 { + compatible = "st,stm32h7-timer-trigger"; + reg = <15>; + status = "disabled"; + }; + }; + + timers17: timer@4c00c000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x4c00c000 0x400>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM17_K>; + clock-names = "int"; + dmas = <&dmamux1 111 0x400 0x1>, + <&dmamux1 112 0x400 0x1>; + dma-names = "ch1", "up"; + access-controllers = <&etzpc 28>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@16 { + compatible = "st,stm32h7-timer-trigger"; + reg = <16>; + status = "disabled"; + }; + }; + + lptimer2: timer@50021000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x50021000 0x400>; + interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM2_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 1>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + + trigger@1 { + compatible = "st,stm32-lptimer-trigger"; + reg = <1>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + status = "disabled"; + }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; + }; + + lptimer3: timer@50022000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x50022000 0x400>; + interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM3_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 2>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + + trigger@2 { + compatible = "st,stm32-lptimer-trigger"; + reg = <2>; + status = "disabled"; + }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; + }; + + hash: hash@54003000 { + compatible = "st,stm32mp13-hash"; + reg = <0x54003000 0x400>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc HASH1>; + resets = <&rcc HASH1_R>; + dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>; + dma-names = "in"; + access-controllers = <&etzpc 41>; + status = "disabled"; + }; + + rng: rng@54004000 { + compatible = "st,stm32mp13-rng"; + reg = <0x54004000 0x400>; + clocks = <&rcc RNG1_K>; + resets = <&rcc RNG1_R>; + access-controllers = <&etzpc 40>; + status = "disabled"; + }; + + fmc: memory-controller@58002000 { + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + #address-cells = <2>; + #size-cells = <1>; + clocks = <&rcc FMC_K>; + resets = <&rcc FMC_R>; + access-controllers = <&etzpc 54>; + status = "disabled"; + + nand-controller@4,0 { + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, + <&mdma 24 0x2 0x12000a08 0x0 0x0>, + <&mdma 25 0x2 0x12000a0a 0x0 0x0>; + dma-names = "tx", "rx", "ecc"; + status = "disabled"; + }; + }; + + qspi: spi@58003000 { + compatible = "st,stm32f469-qspi"; + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, + <&mdma 26 0x2 0x10100008 0x0 0x0>; + dma-names = "tx", "rx"; + clocks = <&rcc QSPI_K>; + resets = <&rcc QSPI_R>; + access-controllers = <&etzpc 55>; + status = "disabled"; + }; + + sdmmc1: mmc@58005000 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x20253180>; + reg = <0x58005000 0x1000>, <0x58006000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SDMMC1_K>; + clock-names = "apb_pclk"; + resets = <&rcc SDMMC1_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <130000000>; + access-controllers = <&etzpc 50>; + status = "disabled"; + }; + + sdmmc2: mmc@58007000 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x20253180>; + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SDMMC2_K>; + clock-names = "apb_pclk"; + resets = <&rcc SDMMC2_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <130000000>; + access-controllers = <&etzpc 51>; + status = "disabled"; + }; + + usbphyc: usbphyc@5a006000 { + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <0>; + compatible = "st,stm32mp1-usbphyc"; + reg = <0x5a006000 0x1000>; + clocks = <&rcc USBPHY_K>; + resets = <&rcc USBPHY_R>; + vdda1v1-supply = <&scmi_reg11>; + vdda1v8-supply = <&scmi_reg18>; + access-controllers = <&etzpc 5>; + status = "disabled"; + + usbphyc_port0: usb-phy@0 { + #phy-cells = <0>; + reg = <0>; + }; + + usbphyc_port1: usb-phy@1 { + #phy-cells = <1>; + reg = <1>; + }; + }; + }; + /* * Break node order to solve dependency probe issue between * pinctrl and exti. diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi index df451c3c2a26..3e394c8e58b9 100644 --- a/arch/arm/boot/dts/st/stm32mp133.dtsi +++ b/arch/arm/boot/dts/st/stm32mp133.dtsi @@ -33,35 +33,38 @@ bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; status = "disabled"; }; + }; +}; - adc_1: adc@48003000 { - compatible = "st,stm32mp13-adc-core"; - reg = <0x48003000 0x400>; - interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc ADC1>, <&rcc ADC1_K>; - clock-names = "bus", "adc"; - interrupt-controller; - #interrupt-cells = <1>; +&etzpc { + adc_1: adc@48003000 { + compatible = "st,stm32mp13-adc-core"; + reg = <0x48003000 0x400>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC1>, <&rcc ADC1_K>; + clock-names = "bus", "adc"; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + access-controllers = <&etzpc 32>; + status = "disabled"; + + adc1: adc@0 { + compatible = "st,stm32mp13-adc"; + #io-channel-cells = <1>; #address-cells = <1>; #size-cells = <0>; + reg = <0x0>; + interrupt-parent = <&adc_1>; + interrupts = <0>; + dmas = <&dmamux1 9 0x400 0x80000001>; + dma-names = "rx"; status = "disabled"; - adc1: adc@0 { - compatible = "st,stm32mp13-adc"; - #io-channel-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0>; - interrupt-parent = <&adc_1>; - interrupts = <0>; - dmas = <&dmamux1 9 0x400 0x80000001>; - dma-names = "rx"; - status = "disabled"; - - channel@18 { - reg = <18>; - label = "vrefint"; - }; + channel@18 { + reg = <18>; + label = "vrefint"; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi index 68d32f9f5314..834a4d545fe4 100644 --- a/arch/arm/boot/dts/st/stm32mp135.dtsi +++ b/arch/arm/boot/dts/st/stm32mp135.dtsi @@ -19,5 +19,16 @@ port { }; }; + + ltdc: display-controller@5a001000 { + compatible = "st,stm32-ltdc"; + reg = <0x5a001000 0x400>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LTDC_PX>; + clock-names = "lcd"; + resets = <&scmi_reset RST_SCMI_LTDC>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index 52171214a308..567e53ad285f 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -66,6 +66,46 @@ default-state = "off"; }; }; + + panel_backlight: panel-backlight { + compatible = "gpio-backlight"; + gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>; + default-on; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + enable-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>; + backlight = <&panel_backlight>; + power-supply = <&scmi_v3v3_sw>; + status = "okay"; + + width-mm = <105>; + height-mm = <67>; + + panel-timing { + clock-frequency = <10000000>; + hactive = <480>; + hback-porch = <43>; + hfront-porch = <10>; + hsync-len = <1>; + hsync-active = <0>; + vactive = <272>; + vback-porch = <26>; + vfront-porch = <4>; + vsync-len = <10>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; }; &adc_1 { @@ -168,6 +208,19 @@ status = "okay"; }; +<dc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <<dc_pins_a>; + pinctrl-1 = <<dc_sleep_pins_a>; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &rtc { status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp13xc.dtsi b/arch/arm/boot/dts/st/stm32mp13xc.dtsi index 4d00e7592882..a8bd5fe6536c 100644 --- a/arch/arm/boot/dts/st/stm32mp13xc.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13xc.dtsi @@ -4,15 +4,14 @@ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. */ -/ { - soc { - cryp: crypto@54002000 { - compatible = "st,stm32mp1-cryp"; - reg = <0x54002000 0x400>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc CRYP1>; - resets = <&rcc CRYP1_R>; - status = "disabled"; - }; +&etzpc { + cryp: crypto@54002000 { + compatible = "st,stm32mp1-cryp"; + reg = <0x54002000 0x400>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc CRYP1>; + resets = <&rcc CRYP1_R>; + access-controllers = <&etzpc 42>; + status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp13xf.dtsi b/arch/arm/boot/dts/st/stm32mp13xf.dtsi index 4d00e7592882..a8bd5fe6536c 100644 --- a/arch/arm/boot/dts/st/stm32mp13xf.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13xf.dtsi @@ -4,15 +4,14 @@ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. */ -/ { - soc { - cryp: crypto@54002000 { - compatible = "st,stm32mp1-cryp"; - reg = <0x54002000 0x400>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc CRYP1>; - resets = <&rcc CRYP1_R>; - status = "disabled"; - }; +&etzpc { + cryp: crypto@54002000 { + compatible = "st,stm32mp1-cryp"; + reg = <0x54002000 0x400>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc CRYP1>; + resets = <&rcc CRYP1_R>; + access-controllers = <&etzpc 42>; + status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index fa4cbd312e5a..16bd6eee32b4 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -122,1042 +122,6 @@ interrupt-parent = <&intc>; ranges; - timers2: timer@40000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40000000 0x400>; - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM2_K>; - clock-names = "int"; - dmas = <&dmamux1 18 0x400 0x1>, - <&dmamux1 19 0x400 0x1>, - <&dmamux1 20 0x400 0x1>, - <&dmamux1 21 0x400 0x1>, - <&dmamux1 22 0x400 0x1>; - dma-names = "ch1", "ch2", "ch3", "ch4", "up"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@1 { - compatible = "st,stm32h7-timer-trigger"; - reg = <1>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-timer-counter"; - status = "disabled"; - }; - }; - - timers3: timer@40001000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40001000 0x400>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM3_K>; - clock-names = "int"; - dmas = <&dmamux1 23 0x400 0x1>, - <&dmamux1 24 0x400 0x1>, - <&dmamux1 25 0x400 0x1>, - <&dmamux1 26 0x400 0x1>, - <&dmamux1 27 0x400 0x1>, - <&dmamux1 28 0x400 0x1>; - dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@2 { - compatible = "st,stm32h7-timer-trigger"; - reg = <2>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-timer-counter"; - status = "disabled"; - }; - }; - - timers4: timer@40002000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40002000 0x400>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM4_K>; - clock-names = "int"; - dmas = <&dmamux1 29 0x400 0x1>, - <&dmamux1 30 0x400 0x1>, - <&dmamux1 31 0x400 0x1>, - <&dmamux1 32 0x400 0x1>; - dma-names = "ch1", "ch2", "ch3", "ch4"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@3 { - compatible = "st,stm32h7-timer-trigger"; - reg = <3>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-timer-counter"; - status = "disabled"; - }; - }; - - timers5: timer@40003000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40003000 0x400>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM5_K>; - clock-names = "int"; - dmas = <&dmamux1 55 0x400 0x1>, - <&dmamux1 56 0x400 0x1>, - <&dmamux1 57 0x400 0x1>, - <&dmamux1 58 0x400 0x1>, - <&dmamux1 59 0x400 0x1>, - <&dmamux1 60 0x400 0x1>; - dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@4 { - compatible = "st,stm32h7-timer-trigger"; - reg = <4>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-timer-counter"; - status = "disabled"; - }; - }; - - timers6: timer@40004000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40004000 0x400>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM6_K>; - clock-names = "int"; - dmas = <&dmamux1 69 0x400 0x1>; - dma-names = "up"; - status = "disabled"; - - timer@5 { - compatible = "st,stm32h7-timer-trigger"; - reg = <5>; - status = "disabled"; - }; - }; - - timers7: timer@40005000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40005000 0x400>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM7_K>; - clock-names = "int"; - dmas = <&dmamux1 70 0x400 0x1>; - dma-names = "up"; - status = "disabled"; - - timer@6 { - compatible = "st,stm32h7-timer-trigger"; - reg = <6>; - status = "disabled"; - }; - }; - - timers12: timer@40006000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40006000 0x400>; - interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM12_K>; - clock-names = "int"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@11 { - compatible = "st,stm32h7-timer-trigger"; - reg = <11>; - status = "disabled"; - }; - }; - - timers13: timer@40007000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40007000 0x400>; - interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM13_K>; - clock-names = "int"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@12 { - compatible = "st,stm32h7-timer-trigger"; - reg = <12>; - status = "disabled"; - }; - }; - - timers14: timer@40008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x40008000 0x400>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM14_K>; - clock-names = "int"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@13 { - compatible = "st,stm32h7-timer-trigger"; - reg = <13>; - status = "disabled"; - }; - }; - - lptimer1: timer@40009000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-lptimer"; - reg = <0x40009000 0x400>; - interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM1_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - - trigger@0 { - compatible = "st,stm32-lptimer-trigger"; - reg = <0>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-lptimer-counter"; - status = "disabled"; - }; - }; - - spi2: spi@4000b000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32h7-spi"; - reg = <0x4000b000 0x400>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI2_K>; - resets = <&rcc SPI2_R>; - dmas = <&dmamux1 39 0x400 0x05>, - <&dmamux1 40 0x400 0x05>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2s2: audio-controller@4000b000 { - compatible = "st,stm32h7-i2s"; - #sound-dai-cells = <0>; - reg = <0x4000b000 0x400>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 39 0x400 0x01>, - <&dmamux1 40 0x400 0x01>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spi3: spi@4000c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32h7-spi"; - reg = <0x4000c000 0x400>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI3_K>; - resets = <&rcc SPI3_R>; - dmas = <&dmamux1 61 0x400 0x05>, - <&dmamux1 62 0x400 0x05>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2s3: audio-controller@4000c000 { - compatible = "st,stm32h7-i2s"; - #sound-dai-cells = <0>; - reg = <0x4000c000 0x400>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 61 0x400 0x01>, - <&dmamux1 62 0x400 0x01>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spdifrx: audio-controller@4000d000 { - compatible = "st,stm32h7-spdifrx"; - #sound-dai-cells = <0>; - reg = <0x4000d000 0x400>; - clocks = <&rcc SPDIF_K>; - clock-names = "kclk"; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 93 0x400 0x01>, - <&dmamux1 94 0x400 0x01>; - dma-names = "rx", "rx-ctrl"; - status = "disabled"; - }; - - usart2: serial@4000e000 { - compatible = "st,stm32h7-uart"; - reg = <0x4000e000 0x400>; - interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc USART2_K>; - wakeup-source; - dmas = <&dmamux1 43 0x400 0x15>, - <&dmamux1 44 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - usart3: serial@4000f000 { - compatible = "st,stm32h7-uart"; - reg = <0x4000f000 0x400>; - interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc USART3_K>; - wakeup-source; - dmas = <&dmamux1 45 0x400 0x15>, - <&dmamux1 46 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart4: serial@40010000 { - compatible = "st,stm32h7-uart"; - reg = <0x40010000 0x400>; - interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc UART4_K>; - wakeup-source; - dmas = <&dmamux1 63 0x400 0x15>, - <&dmamux1 64 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart5: serial@40011000 { - compatible = "st,stm32h7-uart"; - reg = <0x40011000 0x400>; - interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc UART5_K>; - wakeup-source; - dmas = <&dmamux1 65 0x400 0x15>, - <&dmamux1 66 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2c1: i2c@40012000 { - compatible = "st,stm32mp15-i2c"; - reg = <0x40012000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C1_K>; - resets = <&rcc I2C1_R>; - #address-cells = <1>; - #size-cells = <0>; - st,syscfg-fmp = <&syscfg 0x4 0x1>; - wakeup-source; - i2c-analog-filter; - status = "disabled"; - }; - - i2c2: i2c@40013000 { - compatible = "st,stm32mp15-i2c"; - reg = <0x40013000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C2_K>; - resets = <&rcc I2C2_R>; - #address-cells = <1>; - #size-cells = <0>; - st,syscfg-fmp = <&syscfg 0x4 0x2>; - wakeup-source; - i2c-analog-filter; - status = "disabled"; - }; - - i2c3: i2c@40014000 { - compatible = "st,stm32mp15-i2c"; - reg = <0x40014000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C3_K>; - resets = <&rcc I2C3_R>; - #address-cells = <1>; - #size-cells = <0>; - st,syscfg-fmp = <&syscfg 0x4 0x4>; - wakeup-source; - i2c-analog-filter; - status = "disabled"; - }; - - i2c5: i2c@40015000 { - compatible = "st,stm32mp15-i2c"; - reg = <0x40015000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C5_K>; - resets = <&rcc I2C5_R>; - #address-cells = <1>; - #size-cells = <0>; - st,syscfg-fmp = <&syscfg 0x4 0x10>; - wakeup-source; - i2c-analog-filter; - status = "disabled"; - }; - - cec: cec@40016000 { - compatible = "st,stm32-cec"; - reg = <0x40016000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc CEC_K>, <&rcc CEC>; - clock-names = "cec", "hdmi-cec"; - status = "disabled"; - }; - - dac: dac@40017000 { - compatible = "st,stm32h7-dac-core"; - reg = <0x40017000 0x400>; - clocks = <&rcc DAC12>; - clock-names = "pclk"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - dac1: dac@1 { - compatible = "st,stm32-dac"; - #io-channel-cells = <1>; - reg = <1>; - status = "disabled"; - }; - - dac2: dac@2 { - compatible = "st,stm32-dac"; - #io-channel-cells = <1>; - reg = <2>; - status = "disabled"; - }; - }; - - uart7: serial@40018000 { - compatible = "st,stm32h7-uart"; - reg = <0x40018000 0x400>; - interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc UART7_K>; - wakeup-source; - dmas = <&dmamux1 79 0x400 0x15>, - <&dmamux1 80 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart8: serial@40019000 { - compatible = "st,stm32h7-uart"; - reg = <0x40019000 0x400>; - interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc UART8_K>; - wakeup-source; - dmas = <&dmamux1 81 0x400 0x15>, - <&dmamux1 82 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - timers1: timer@44000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x44000000 0x400>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "brk", "up", "trg-com", "cc"; - clocks = <&rcc TIM1_K>; - clock-names = "int"; - dmas = <&dmamux1 11 0x400 0x1>, - <&dmamux1 12 0x400 0x1>, - <&dmamux1 13 0x400 0x1>, - <&dmamux1 14 0x400 0x1>, - <&dmamux1 15 0x400 0x1>, - <&dmamux1 16 0x400 0x1>, - <&dmamux1 17 0x400 0x1>; - dma-names = "ch1", "ch2", "ch3", "ch4", - "up", "trig", "com"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@0 { - compatible = "st,stm32h7-timer-trigger"; - reg = <0>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-timer-counter"; - status = "disabled"; - }; - }; - - timers8: timer@44001000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x44001000 0x400>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "brk", "up", "trg-com", "cc"; - clocks = <&rcc TIM8_K>; - clock-names = "int"; - dmas = <&dmamux1 47 0x400 0x1>, - <&dmamux1 48 0x400 0x1>, - <&dmamux1 49 0x400 0x1>, - <&dmamux1 50 0x400 0x1>, - <&dmamux1 51 0x400 0x1>, - <&dmamux1 52 0x400 0x1>, - <&dmamux1 53 0x400 0x1>; - dma-names = "ch1", "ch2", "ch3", "ch4", - "up", "trig", "com"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@7 { - compatible = "st,stm32h7-timer-trigger"; - reg = <7>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-timer-counter"; - status = "disabled"; - }; - }; - - usart6: serial@44003000 { - compatible = "st,stm32h7-uart"; - reg = <0x44003000 0x400>; - interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc USART6_K>; - wakeup-source; - dmas = <&dmamux1 71 0x400 0x15>, - <&dmamux1 72 0x400 0x11>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spi1: spi@44004000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32h7-spi"; - reg = <0x44004000 0x400>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI1_K>; - resets = <&rcc SPI1_R>; - dmas = <&dmamux1 37 0x400 0x05>, - <&dmamux1 38 0x400 0x05>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2s1: audio-controller@44004000 { - compatible = "st,stm32h7-i2s"; - #sound-dai-cells = <0>; - reg = <0x44004000 0x400>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 37 0x400 0x01>, - <&dmamux1 38 0x400 0x01>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spi4: spi@44005000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32h7-spi"; - reg = <0x44005000 0x400>; - interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI4_K>; - resets = <&rcc SPI4_R>; - dmas = <&dmamux1 83 0x400 0x05>, - <&dmamux1 84 0x400 0x05>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - timers15: timer@44006000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x44006000 0x400>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM15_K>; - clock-names = "int"; - dmas = <&dmamux1 105 0x400 0x1>, - <&dmamux1 106 0x400 0x1>, - <&dmamux1 107 0x400 0x1>, - <&dmamux1 108 0x400 0x1>; - dma-names = "ch1", "up", "trig", "com"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@14 { - compatible = "st,stm32h7-timer-trigger"; - reg = <14>; - status = "disabled"; - }; - }; - - timers16: timer@44007000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x44007000 0x400>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM16_K>; - clock-names = "int"; - dmas = <&dmamux1 109 0x400 0x1>, - <&dmamux1 110 0x400 0x1>; - dma-names = "ch1", "up"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - timer@15 { - compatible = "st,stm32h7-timer-trigger"; - reg = <15>; - status = "disabled"; - }; - }; - - timers17: timer@44008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-timers"; - reg = <0x44008000 0x400>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "global"; - clocks = <&rcc TIM17_K>; - clock-names = "int"; - dmas = <&dmamux1 111 0x400 0x1>, - <&dmamux1 112 0x400 0x1>; - dma-names = "ch1", "up"; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm"; - #pwm-cells = <3>; - status = "disabled"; - }; - - timer@16 { - compatible = "st,stm32h7-timer-trigger"; - reg = <16>; - status = "disabled"; - }; - }; - - spi5: spi@44009000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32h7-spi"; - reg = <0x44009000 0x400>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI5_K>; - resets = <&rcc SPI5_R>; - dmas = <&dmamux1 85 0x400 0x05>, - <&dmamux1 86 0x400 0x05>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - sai1: sai@4400a000 { - compatible = "st,stm32h7-sai"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x4400a000 0x400>; - reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>; - interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - resets = <&rcc SAI1_R>; - status = "disabled"; - - sai1a: audio-controller@4400a004 { - #sound-dai-cells = <0>; - - compatible = "st,stm32-sai-sub-a"; - reg = <0x4 0x20>; - clocks = <&rcc SAI1_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 87 0x400 0x01>; - status = "disabled"; - }; - - sai1b: audio-controller@4400a024 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-b"; - reg = <0x24 0x20>; - clocks = <&rcc SAI1_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 88 0x400 0x01>; - status = "disabled"; - }; - }; - - sai2: sai@4400b000 { - compatible = "st,stm32h7-sai"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x4400b000 0x400>; - reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - resets = <&rcc SAI2_R>; - status = "disabled"; - - sai2a: audio-controller@4400b004 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-a"; - reg = <0x4 0x20>; - clocks = <&rcc SAI2_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 89 0x400 0x01>; - status = "disabled"; - }; - - sai2b: audio-controller@4400b024 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-b"; - reg = <0x24 0x20>; - clocks = <&rcc SAI2_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 90 0x400 0x01>; - status = "disabled"; - }; - }; - - sai3: sai@4400c000 { - compatible = "st,stm32h7-sai"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x4400c000 0x400>; - reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>; - interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - resets = <&rcc SAI3_R>; - status = "disabled"; - - sai3a: audio-controller@4400c004 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-a"; - reg = <0x04 0x20>; - clocks = <&rcc SAI3_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 113 0x400 0x01>; - status = "disabled"; - }; - - sai3b: audio-controller@4400c024 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-b"; - reg = <0x24 0x20>; - clocks = <&rcc SAI3_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 114 0x400 0x01>; - status = "disabled"; - }; - }; - - dfsdm: dfsdm@4400d000 { - compatible = "st,stm32mp1-dfsdm"; - reg = <0x4400d000 0x800>; - clocks = <&rcc DFSDM_K>; - clock-names = "dfsdm"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - dfsdm0: filter@0 { - compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; - reg = <0>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 101 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - - dfsdm1: filter@1 { - compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; - reg = <1>; - interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 102 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - - dfsdm2: filter@2 { - compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; - reg = <2>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 103 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - - dfsdm3: filter@3 { - compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; - reg = <3>; - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 104 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - - dfsdm4: filter@4 { - compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; - reg = <4>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 91 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - - dfsdm5: filter@5 { - compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; - reg = <5>; - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmamux1 92 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - }; - - dma1: dma-controller@48000000 { - compatible = "st,stm32-dma"; - reg = <0x48000000 0x400>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc DMA1>; - resets = <&rcc DMA1_R>; - #dma-cells = <4>; - st,mem2mem; - dma-requests = <8>; - }; - - dma2: dma-controller@48001000 { - compatible = "st,stm32-dma"; - reg = <0x48001000 0x400>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc DMA2>; - resets = <&rcc DMA2_R>; - #dma-cells = <4>; - st,mem2mem; - dma-requests = <8>; - }; - - dmamux1: dma-router@48002000 { - compatible = "st,stm32h7-dmamux"; - reg = <0x48002000 0x40>; - #dma-cells = <3>; - dma-requests = <128>; - dma-masters = <&dma1 &dma2>; - dma-channels = <16>; - clocks = <&rcc DMAMUX>; - resets = <&rcc DMAMUX_R>; - }; - - adc: adc@48003000 { - compatible = "st,stm32mp1-adc-core"; - reg = <0x48003000 0x400>; - interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc ADC12>, <&rcc ADC12_K>; - clock-names = "bus", "adc"; - interrupt-controller; - st,syscfg = <&syscfg>; - #interrupt-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - adc1: adc@0 { - compatible = "st,stm32mp1-adc"; - #io-channel-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0>; - interrupt-parent = <&adc>; - interrupts = <0>; - dmas = <&dmamux1 9 0x400 0x01>; - dma-names = "rx"; - status = "disabled"; - }; - - adc2: adc@100 { - compatible = "st,stm32mp1-adc"; - #io-channel-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x100>; - interrupt-parent = <&adc>; - interrupts = <1>; - dmas = <&dmamux1 10 0x400 0x01>; - dma-names = "rx"; - nvmem-cells = <&vrefint>; - nvmem-cell-names = "vrefint"; - status = "disabled"; - channel@13 { - reg = <13>; - label = "vrefint"; - }; - channel@14 { - reg = <14>; - label = "vddcore"; - }; - }; - }; - - sdmmc3: mmc@48004000 { - compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00253180>; - reg = <0x48004000 0x400>; - interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SDMMC3_K>; - clock-names = "apb_pclk"; - resets = <&rcc SDMMC3_R>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <120000000>; - status = "disabled"; - }; - - usbotg_hs: usb-otg@49000000 { - compatible = "st,stm32mp15-hsotg", "snps,dwc2"; - reg = <0x49000000 0x10000>; - clocks = <&rcc USBO_K>, <&usbphyc>; - clock-names = "otg", "utmi"; - resets = <&rcc USBO_R>; - reset-names = "dwc2"; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - g-rx-fifo-size = <512>; - g-np-tx-fifo-size = <32>; - g-tx-fifo-size = <256 16 16 16 16 16 16 16>; - dr_mode = "otg"; - otg-rev = <0x200>; - usb33d-supply = <&usb33>; - status = "disabled"; - }; - ipcc: mailbox@4c001000 { compatible = "st,stm32mp1-ipcc"; #mbox-cells = <1>; @@ -1172,18 +136,6 @@ status = "disabled"; }; - dcmi: dcmi@4c006000 { - compatible = "st,stm32-dcmi"; - reg = <0x4c006000 0x400>; - interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; - resets = <&rcc CAMITF_R>; - clocks = <&rcc DCMI>; - clock-names = "mclk"; - dmas = <&dmamux1 75 0x400 0x01>; - dma-names = "tx"; - status = "disabled"; - }; - rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>; @@ -1232,131 +184,6 @@ clocks = <&rcc SYSCFG>; }; - lptimer2: timer@50021000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-lptimer"; - reg = <0x50021000 0x400>; - interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM2_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - - trigger@1 { - compatible = "st,stm32-lptimer-trigger"; - reg = <1>; - status = "disabled"; - }; - - counter { - compatible = "st,stm32-lptimer-counter"; - status = "disabled"; - }; - }; - - lptimer3: timer@50022000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32-lptimer"; - reg = <0x50022000 0x400>; - interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM3_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - - trigger@2 { - compatible = "st,stm32-lptimer-trigger"; - reg = <2>; - status = "disabled"; - }; - }; - - lptimer4: timer@50023000 { - compatible = "st,stm32-lptimer"; - reg = <0x50023000 0x400>; - interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM4_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - }; - - lptimer5: timer@50024000 { - compatible = "st,stm32-lptimer"; - reg = <0x50024000 0x400>; - interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc LPTIM5_K>; - clock-names = "mux"; - wakeup-source; - status = "disabled"; - - pwm { - compatible = "st,stm32-pwm-lp"; - #pwm-cells = <3>; - status = "disabled"; - }; - }; - - vrefbuf: vrefbuf@50025000 { - compatible = "st,stm32-vrefbuf"; - reg = <0x50025000 0x8>; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2500000>; - clocks = <&rcc VREF>; - status = "disabled"; - }; - - sai4: sai@50027000 { - compatible = "st,stm32h7-sai"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x50027000 0x400>; - reg = <0x50027000 0x4>, <0x500273f0 0x10>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - resets = <&rcc SAI4_R>; - status = "disabled"; - - sai4a: audio-controller@50027004 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-a"; - reg = <0x04 0x20>; - clocks = <&rcc SAI4_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 99 0x400 0x01>; - status = "disabled"; - }; - - sai4b: audio-controller@50027024 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-b"; - reg = <0x24 0x20>; - clocks = <&rcc SAI4_K>; - clock-names = "sai_ck"; - dmas = <&dmamux1 100 0x400 0x01>; - status = "disabled"; - }; - }; - dts: thermal@50028000 { compatible = "st,stm32-thermal"; reg = <0x50028000 0x100>; @@ -1367,26 +194,6 @@ status = "disabled"; }; - hash1: hash@54002000 { - compatible = "st,stm32f756-hash"; - reg = <0x54002000 0x400>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc HASH1>; - resets = <&rcc HASH1_R>; - dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>; - dma-names = "in"; - dma-maxburst = <2>; - status = "disabled"; - }; - - rng1: rng@54003000 { - compatible = "st,stm32-rng"; - reg = <0x54003000 0x400>; - clocks = <&rcc RNG1_K>; - resets = <&rcc RNG1_R>; - status = "disabled"; - }; - mdma1: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; @@ -1398,55 +205,6 @@ dma-requests = <48>; }; - fmc: memory-controller@58002000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "st,stm32mp1-fmc2-ebi"; - reg = <0x58002000 0x1000>; - clocks = <&rcc FMC_K>; - resets = <&rcc FMC_R>; - status = "disabled"; - - ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ - <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ - <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ - <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ - <4 0 0x80000000 0x10000000>; /* NAND */ - - nand-controller@4,0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32mp1-fmc2-nfc"; - reg = <4 0x00000000 0x1000>, - <4 0x08010000 0x1000>, - <4 0x08020000 0x1000>, - <4 0x01000000 0x1000>, - <4 0x09010000 0x1000>, - <4 0x09020000 0x1000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>, - <&mdma1 20 0x2 0x12000a08 0x0 0x0>, - <&mdma1 21 0x2 0x12000a0a 0x0 0x0>; - dma-names = "tx", "rx", "ecc"; - status = "disabled"; - }; - }; - - qspi: spi@58003000 { - compatible = "st,stm32f469-qspi"; - reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; - reg-names = "qspi", "qspi_mm"; - interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>, - <&mdma1 22 0x2 0x10100008 0x0 0x0>; - dma-names = "tx", "rx"; - clocks = <&rcc QSPI_K>; - resets = <&rcc QSPI_R>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - sdmmc1: mmc@58005000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; @@ -1482,39 +240,6 @@ status = "disabled"; }; - ethernet0: ethernet@5800a000 { - compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; - reg = <0x5800a000 0x2000>; - reg-names = "stmmaceth"; - interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq"; - clock-names = "stmmaceth", - "mac-clk-tx", - "mac-clk-rx", - "eth-ck", - "ptp_ref", - "ethstp"; - clocks = <&rcc ETHMAC>, - <&rcc ETHTX>, - <&rcc ETHRX>, - <&rcc ETHCK_K>, - <&rcc ETHPTP_K>, - <&rcc ETHSTP>; - st,syscon = <&syscfg 0x4>; - snps,mixed-burst; - snps,pbl = <2>; - snps,en-tx-lpi-clockgating; - snps,axi-config = <&stmmac_axi_config_0>; - snps,tso; - status = "disabled"; - - stmmac_axi_config_0: stmmac-axi-config { - snps,wr_osr_lmt = <0x7>; - snps,rd_osr_lmt = <0x7>; - snps,blen = <0 0 0 0 16 8 4>; - }; - }; - usbh_ohci: usb@5800c000 { compatible = "generic-ohci"; reg = <0x5800c000 0x1000>; @@ -1580,45 +305,6 @@ }; }; - usart1: serial@5c000000 { - compatible = "st,stm32h7-uart"; - reg = <0x5c000000 0x400>; - interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc USART1_K>; - wakeup-source; - status = "disabled"; - }; - - spi6: spi@5c001000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "st,stm32h7-spi"; - reg = <0x5c001000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc SPI6_K>; - resets = <&rcc SPI6_R>; - dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>, - <&mdma1 35 0x0 0x40002 0x0 0x0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2c4: i2c@5c002000 { - compatible = "st,stm32mp15-i2c"; - reg = <0x5c002000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C4_K>; - resets = <&rcc I2C4_R>; - #address-cells = <1>; - #size-cells = <0>; - st,syscfg-fmp = <&syscfg 0x4 0x8>; - wakeup-source; - i2c-analog-filter; - status = "disabled"; - }; - rtc: rtc@5c004000 { compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; @@ -1647,20 +333,1406 @@ }; }; - i2c6: i2c@5c009000 { - compatible = "st,stm32mp15-i2c"; - reg = <0x5c009000 0x400>; - interrupt-names = "event", "error"; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc I2C6_K>; - resets = <&rcc I2C6_R>; + etzpc: bus@5c007000 { + compatible = "st,stm32-etzpc", "simple-bus"; + reg = <0x5c007000 0x400>; #address-cells = <1>; - #size-cells = <0>; - st,syscfg-fmp = <&syscfg 0x4 0x20>; - wakeup-source; - i2c-analog-filter; - status = "disabled"; + #size-cells = <1>; + #access-controller-cells = <1>; + ranges; + + timers2: timer@40000000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40000000 0x400>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM2_K>; + clock-names = "int"; + dmas = <&dmamux1 18 0x400 0x1>, + <&dmamux1 19 0x400 0x1>, + <&dmamux1 20 0x400 0x1>, + <&dmamux1 21 0x400 0x1>, + <&dmamux1 22 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up"; + access-controllers = <&etzpc 16>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@1 { + compatible = "st,stm32h7-timer-trigger"; + reg = <1>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-timer-counter"; + status = "disabled"; + }; + }; + + timers3: timer@40001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40001000 0x400>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM3_K>; + clock-names = "int"; + dmas = <&dmamux1 23 0x400 0x1>, + <&dmamux1 24 0x400 0x1>, + <&dmamux1 25 0x400 0x1>, + <&dmamux1 26 0x400 0x1>, + <&dmamux1 27 0x400 0x1>, + <&dmamux1 28 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; + access-controllers = <&etzpc 17>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@2 { + compatible = "st,stm32h7-timer-trigger"; + reg = <2>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-timer-counter"; + status = "disabled"; + }; + }; + + timers4: timer@40002000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40002000 0x400>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM4_K>; + clock-names = "int"; + dmas = <&dmamux1 29 0x400 0x1>, + <&dmamux1 30 0x400 0x1>, + <&dmamux1 31 0x400 0x1>, + <&dmamux1 32 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4"; + access-controllers = <&etzpc 18>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@3 { + compatible = "st,stm32h7-timer-trigger"; + reg = <3>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-timer-counter"; + status = "disabled"; + }; + }; + + timers5: timer@40003000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40003000 0x400>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM5_K>; + clock-names = "int"; + dmas = <&dmamux1 55 0x400 0x1>, + <&dmamux1 56 0x400 0x1>, + <&dmamux1 57 0x400 0x1>, + <&dmamux1 58 0x400 0x1>, + <&dmamux1 59 0x400 0x1>, + <&dmamux1 60 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; + access-controllers = <&etzpc 19>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@4 { + compatible = "st,stm32h7-timer-trigger"; + reg = <4>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-timer-counter"; + status = "disabled"; + }; + }; + + timers6: timer@40004000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40004000 0x400>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM6_K>; + clock-names = "int"; + dmas = <&dmamux1 69 0x400 0x1>; + dma-names = "up"; + access-controllers = <&etzpc 20>; + status = "disabled"; + + timer@5 { + compatible = "st,stm32h7-timer-trigger"; + reg = <5>; + status = "disabled"; + }; + }; + + timers7: timer@40005000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40005000 0x400>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM7_K>; + clock-names = "int"; + dmas = <&dmamux1 70 0x400 0x1>; + dma-names = "up"; + access-controllers = <&etzpc 21>; + status = "disabled"; + + timer@6 { + compatible = "st,stm32h7-timer-trigger"; + reg = <6>; + status = "disabled"; + }; + }; + + timers12: timer@40006000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40006000 0x400>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM12_K>; + clock-names = "int"; + access-controllers = <&etzpc 22>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@11 { + compatible = "st,stm32h7-timer-trigger"; + reg = <11>; + status = "disabled"; + }; + }; + + timers13: timer@40007000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40007000 0x400>; + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM13_K>; + clock-names = "int"; + access-controllers = <&etzpc 23>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@12 { + compatible = "st,stm32h7-timer-trigger"; + reg = <12>; + status = "disabled"; + }; + }; + + timers14: timer@40008000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40008000 0x400>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM14_K>; + clock-names = "int"; + access-controllers = <&etzpc 24>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@13 { + compatible = "st,stm32h7-timer-trigger"; + reg = <13>; + status = "disabled"; + }; + }; + + lptimer1: timer@40009000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x40009000 0x400>; + interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM1_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 25>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + + trigger@0 { + compatible = "st,stm32-lptimer-trigger"; + reg = <0>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + status = "disabled"; + }; + }; + + i2s2: audio-controller@4000b000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x4000b000 0x400>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 39 0x400 0x01>, + <&dmamux1 40 0x400 0x01>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 27>; + status = "disabled"; + }; + + spi2: spi@4000b000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x4000b000 0x400>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI2_K>; + resets = <&rcc SPI2_R>; + dmas = <&dmamux1 39 0x400 0x05>, + <&dmamux1 40 0x400 0x05>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 27>; + status = "disabled"; + }; + + i2s3: audio-controller@4000c000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x4000c000 0x400>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 61 0x400 0x01>, + <&dmamux1 62 0x400 0x01>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 28>; + status = "disabled"; + }; + + spi3: spi@4000c000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x4000c000 0x400>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI3_K>; + resets = <&rcc SPI3_R>; + dmas = <&dmamux1 61 0x400 0x05>, + <&dmamux1 62 0x400 0x05>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 28>; + status = "disabled"; + }; + + spdifrx: audio-controller@4000d000 { + compatible = "st,stm32h7-spdifrx"; + #sound-dai-cells = <0>; + reg = <0x4000d000 0x400>; + clocks = <&rcc SPDIF_K>; + clock-names = "kclk"; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 93 0x400 0x01>, + <&dmamux1 94 0x400 0x01>; + dma-names = "rx", "rx-ctrl"; + access-controllers = <&etzpc 29>; + status = "disabled"; + }; + + usart2: serial@4000e000 { + compatible = "st,stm32h7-uart"; + reg = <0x4000e000 0x400>; + interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART2_K>; + wakeup-source; + dmas = <&dmamux1 43 0x400 0x15>, + <&dmamux1 44 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 30>; + status = "disabled"; + }; + + usart3: serial@4000f000 { + compatible = "st,stm32h7-uart"; + reg = <0x4000f000 0x400>; + interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART3_K>; + wakeup-source; + dmas = <&dmamux1 45 0x400 0x15>, + <&dmamux1 46 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 31>; + status = "disabled"; + }; + + uart4: serial@40010000 { + compatible = "st,stm32h7-uart"; + reg = <0x40010000 0x400>; + interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART4_K>; + wakeup-source; + dmas = <&dmamux1 63 0x400 0x15>, + <&dmamux1 64 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 32>; + status = "disabled"; + }; + + uart5: serial@40011000 { + compatible = "st,stm32h7-uart"; + reg = <0x40011000 0x400>; + interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART5_K>; + wakeup-source; + dmas = <&dmamux1 65 0x400 0x15>, + <&dmamux1 66 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 33>; + status = "disabled"; + }; + + i2c1: i2c@40012000 { + compatible = "st,stm32mp15-i2c"; + reg = <0x40012000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C1_K>; + resets = <&rcc I2C1_R>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-fmp = <&syscfg 0x4 0x1>; + wakeup-source; + i2c-analog-filter; + access-controllers = <&etzpc 34>; + status = "disabled"; + }; + + i2c2: i2c@40013000 { + compatible = "st,stm32mp15-i2c"; + reg = <0x40013000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C2_K>; + resets = <&rcc I2C2_R>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-fmp = <&syscfg 0x4 0x2>; + wakeup-source; + i2c-analog-filter; + access-controllers = <&etzpc 35>; + status = "disabled"; + }; + + i2c3: i2c@40014000 { + compatible = "st,stm32mp15-i2c"; + reg = <0x40014000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C3_K>; + resets = <&rcc I2C3_R>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-fmp = <&syscfg 0x4 0x4>; + wakeup-source; + i2c-analog-filter; + access-controllers = <&etzpc 36>; + status = "disabled"; + }; + + i2c5: i2c@40015000 { + compatible = "st,stm32mp15-i2c"; + reg = <0x40015000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C5_K>; + resets = <&rcc I2C5_R>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-fmp = <&syscfg 0x4 0x10>; + wakeup-source; + i2c-analog-filter; + access-controllers = <&etzpc 37>; + status = "disabled"; + }; + + cec: cec@40016000 { + compatible = "st,stm32-cec"; + reg = <0x40016000 0x400>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc CEC_K>, <&rcc CEC>; + clock-names = "cec", "hdmi-cec"; + access-controllers = <&etzpc 38>; + status = "disabled"; + }; + + dac: dac@40017000 { + compatible = "st,stm32h7-dac-core"; + reg = <0x40017000 0x400>; + clocks = <&rcc DAC12>; + clock-names = "pclk"; + #address-cells = <1>; + #size-cells = <0>; + access-controllers = <&etzpc 39>; + status = "disabled"; + + dac1: dac@1 { + compatible = "st,stm32-dac"; + #io-channel-cells = <1>; + reg = <1>; + status = "disabled"; + }; + + dac2: dac@2 { + compatible = "st,stm32-dac"; + #io-channel-cells = <1>; + reg = <2>; + status = "disabled"; + }; + }; + + uart7: serial@40018000 { + compatible = "st,stm32h7-uart"; + reg = <0x40018000 0x400>; + interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART7_K>; + wakeup-source; + dmas = <&dmamux1 79 0x400 0x15>, + <&dmamux1 80 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 40>; + status = "disabled"; + }; + + uart8: serial@40019000 { + compatible = "st,stm32h7-uart"; + reg = <0x40019000 0x400>; + interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART8_K>; + wakeup-source; + dmas = <&dmamux1 81 0x400 0x15>, + <&dmamux1 82 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 41>; + status = "disabled"; + }; + + timers1: timer@44000000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x44000000 0x400>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "brk", "up", "trg-com", "cc"; + clocks = <&rcc TIM1_K>; + clock-names = "int"; + dmas = <&dmamux1 11 0x400 0x1>, + <&dmamux1 12 0x400 0x1>, + <&dmamux1 13 0x400 0x1>, + <&dmamux1 14 0x400 0x1>, + <&dmamux1 15 0x400 0x1>, + <&dmamux1 16 0x400 0x1>, + <&dmamux1 17 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", + "up", "trig", "com"; + access-controllers = <&etzpc 48>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@0 { + compatible = "st,stm32h7-timer-trigger"; + reg = <0>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-timer-counter"; + status = "disabled"; + }; + }; + + timers8: timer@44001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x44001000 0x400>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "brk", "up", "trg-com", "cc"; + clocks = <&rcc TIM8_K>; + clock-names = "int"; + dmas = <&dmamux1 47 0x400 0x1>, + <&dmamux1 48 0x400 0x1>, + <&dmamux1 49 0x400 0x1>, + <&dmamux1 50 0x400 0x1>, + <&dmamux1 51 0x400 0x1>, + <&dmamux1 52 0x400 0x1>, + <&dmamux1 53 0x400 0x1>; + dma-names = "ch1", "ch2", "ch3", "ch4", + "up", "trig", "com"; + access-controllers = <&etzpc 49>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@7 { + compatible = "st,stm32h7-timer-trigger"; + reg = <7>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-timer-counter"; + status = "disabled"; + }; + }; + + usart6: serial@44003000 { + compatible = "st,stm32h7-uart"; + reg = <0x44003000 0x400>; + interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART6_K>; + wakeup-source; + dmas = <&dmamux1 71 0x400 0x15>, + <&dmamux1 72 0x400 0x11>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 51>; + status = "disabled"; + }; + + i2s1: audio-controller@44004000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x44004000 0x400>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 37 0x400 0x01>, + <&dmamux1 38 0x400 0x01>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 52>; + status = "disabled"; + }; + + spi1: spi@44004000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x44004000 0x400>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI1_K>; + resets = <&rcc SPI1_R>; + dmas = <&dmamux1 37 0x400 0x05>, + <&dmamux1 38 0x400 0x05>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 52>; + status = "disabled"; + }; + + spi4: spi@44005000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x44005000 0x400>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI4_K>; + resets = <&rcc SPI4_R>; + dmas = <&dmamux1 83 0x400 0x05>, + <&dmamux1 84 0x400 0x05>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 53>; + status = "disabled"; + }; + + timers15: timer@44006000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x44006000 0x400>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM15_K>; + clock-names = "int"; + dmas = <&dmamux1 105 0x400 0x1>, + <&dmamux1 106 0x400 0x1>, + <&dmamux1 107 0x400 0x1>, + <&dmamux1 108 0x400 0x1>; + dma-names = "ch1", "up", "trig", "com"; + access-controllers = <&etzpc 54>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@14 { + compatible = "st,stm32h7-timer-trigger"; + reg = <14>; + status = "disabled"; + }; + }; + + timers16: timer@44007000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x44007000 0x400>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM16_K>; + clock-names = "int"; + dmas = <&dmamux1 109 0x400 0x1>, + <&dmamux1 110 0x400 0x1>; + dma-names = "ch1", "up"; + access-controllers = <&etzpc 55>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + timer@15 { + compatible = "st,stm32h7-timer-trigger"; + reg = <15>; + status = "disabled"; + }; + }; + + timers17: timer@44008000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x44008000 0x400>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global"; + clocks = <&rcc TIM17_K>; + clock-names = "int"; + dmas = <&dmamux1 111 0x400 0x1>, + <&dmamux1 112 0x400 0x1>; + dma-names = "ch1", "up"; + access-controllers = <&etzpc 56>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm"; + #pwm-cells = <3>; + status = "disabled"; + }; + + timer@16 { + compatible = "st,stm32h7-timer-trigger"; + reg = <16>; + status = "disabled"; + }; + }; + + spi5: spi@44009000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x44009000 0x400>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI5_K>; + resets = <&rcc SPI5_R>; + dmas = <&dmamux1 85 0x400 0x05>, + <&dmamux1 86 0x400 0x05>; + dma-names = "rx", "tx"; + access-controllers = <&etzpc 57>; + status = "disabled"; + }; + + sai1: sai@4400a000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4400a000 0x400>; + reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rcc SAI1_R>; + access-controllers = <&etzpc 58>; + status = "disabled"; + + sai1a: audio-controller@4400a004 { + #sound-dai-cells = <0>; + + compatible = "st,stm32-sai-sub-a"; + reg = <0x4 0x20>; + clocks = <&rcc SAI1_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 87 0x400 0x01>; + status = "disabled"; + }; + + sai1b: audio-controller@4400a024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x20>; + clocks = <&rcc SAI1_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 88 0x400 0x01>; + status = "disabled"; + }; + }; + + sai2: sai@4400b000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4400b000 0x400>; + reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rcc SAI2_R>; + access-controllers = <&etzpc 59>; + status = "disabled"; + + sai2a: audio-controller@4400b004 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-a"; + reg = <0x4 0x20>; + clocks = <&rcc SAI2_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 89 0x400 0x01>; + status = "disabled"; + }; + + sai2b: audio-controller@4400b024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x20>; + clocks = <&rcc SAI2_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 90 0x400 0x01>; + status = "disabled"; + }; + }; + + sai3: sai@4400c000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4400c000 0x400>; + reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rcc SAI3_R>; + access-controllers = <&etzpc 60>; + status = "disabled"; + + sai3a: audio-controller@4400c004 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-a"; + reg = <0x04 0x20>; + clocks = <&rcc SAI3_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 113 0x400 0x01>; + status = "disabled"; + }; + + sai3b: audio-controller@4400c024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x20>; + clocks = <&rcc SAI3_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 114 0x400 0x01>; + status = "disabled"; + }; + }; + + dfsdm: dfsdm@4400d000 { + compatible = "st,stm32mp1-dfsdm"; + reg = <0x4400d000 0x800>; + clocks = <&rcc DFSDM_K>; + clock-names = "dfsdm"; + #address-cells = <1>; + #size-cells = <0>; + access-controllers = <&etzpc 61>; + status = "disabled"; + + dfsdm0: filter@0 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <0>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 101 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + + dfsdm1: filter@1 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <1>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 102 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + + dfsdm2: filter@2 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <2>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 103 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + + dfsdm3: filter@3 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <3>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 104 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + + dfsdm4: filter@4 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <4>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 91 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + + dfsdm5: filter@5 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <5>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmamux1 92 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + }; + + dma1: dma-controller@48000000 { + compatible = "st,stm32-dma"; + reg = <0x48000000 0x400>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc DMA1>; + resets = <&rcc DMA1_R>; + #dma-cells = <4>; + st,mem2mem; + dma-requests = <8>; + access-controllers = <&etzpc 88>; + }; + + dma2: dma-controller@48001000 { + compatible = "st,stm32-dma"; + reg = <0x48001000 0x400>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc DMA2>; + resets = <&rcc DMA2_R>; + #dma-cells = <4>; + st,mem2mem; + dma-requests = <8>; + access-controllers = <&etzpc 89>; + }; + + dmamux1: dma-router@48002000 { + compatible = "st,stm32h7-dmamux"; + reg = <0x48002000 0x40>; + #dma-cells = <3>; + dma-requests = <128>; + dma-masters = <&dma1 &dma2>; + dma-channels = <16>; + clocks = <&rcc DMAMUX>; + resets = <&rcc DMAMUX_R>; + access-controllers = <&etzpc 90>; + }; + + adc: adc@48003000 { + compatible = "st,stm32mp1-adc-core"; + reg = <0x48003000 0x400>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC12>, <&rcc ADC12_K>; + clock-names = "bus", "adc"; + interrupt-controller; + st,syscfg = <&syscfg>; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + access-controllers = <&etzpc 72>; + status = "disabled"; + + adc1: adc@0 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + interrupt-parent = <&adc>; + interrupts = <0>; + dmas = <&dmamux1 9 0x400 0x01>; + dma-names = "rx"; + status = "disabled"; + }; + + adc2: adc@100 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x100>; + interrupt-parent = <&adc>; + interrupts = <1>; + dmas = <&dmamux1 10 0x400 0x01>; + dma-names = "rx"; + nvmem-cells = <&vrefint>; + nvmem-cell-names = "vrefint"; + status = "disabled"; + channel@13 { + reg = <13>; + label = "vrefint"; + }; + channel@14 { + reg = <14>; + label = "vddcore"; + }; + }; + }; + + sdmmc3: mmc@48004000 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00253180>; + reg = <0x48004000 0x400>; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SDMMC3_K>; + clock-names = "apb_pclk"; + resets = <&rcc SDMMC3_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + access-controllers = <&etzpc 86>; + status = "disabled"; + }; + + usbotg_hs: usb-otg@49000000 { + compatible = "st,stm32mp15-hsotg", "snps,dwc2"; + reg = <0x49000000 0x10000>; + clocks = <&rcc USBO_K>, <&usbphyc>; + clock-names = "otg", "utmi"; + resets = <&rcc USBO_R>; + reset-names = "dwc2"; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <32>; + g-tx-fifo-size = <256 16 16 16 16 16 16 16>; + dr_mode = "otg"; + otg-rev = <0x200>; + usb33d-supply = <&usb33>; + access-controllers = <&etzpc 85>; + status = "disabled"; + }; + + dcmi: dcmi@4c006000 { + compatible = "st,stm32-dcmi"; + reg = <0x4c006000 0x400>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rcc CAMITF_R>; + clocks = <&rcc DCMI>; + clock-names = "mclk"; + dmas = <&dmamux1 75 0x400 0x01>; + dma-names = "tx"; + access-controllers = <&etzpc 70>; + status = "disabled"; + }; + + lptimer2: timer@50021000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x50021000 0x400>; + interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM2_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 64>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + + trigger@1 { + compatible = "st,stm32-lptimer-trigger"; + reg = <1>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + status = "disabled"; + }; + }; + + lptimer3: timer@50022000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x50022000 0x400>; + interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM3_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 65>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + + trigger@2 { + compatible = "st,stm32-lptimer-trigger"; + reg = <2>; + status = "disabled"; + }; + }; + + lptimer4: timer@50023000 { + compatible = "st,stm32-lptimer"; + reg = <0x50023000 0x400>; + interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM4_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 66>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + }; + + lptimer5: timer@50024000 { + compatible = "st,stm32-lptimer"; + reg = <0x50024000 0x400>; + interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc LPTIM5_K>; + clock-names = "mux"; + wakeup-source; + access-controllers = <&etzpc 67>; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; + status = "disabled"; + }; + }; + + vrefbuf: vrefbuf@50025000 { + compatible = "st,stm32-vrefbuf"; + reg = <0x50025000 0x8>; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2500000>; + clocks = <&rcc VREF>; + access-controllers = <&etzpc 69>; + status = "disabled"; + }; + + sai4: sai@50027000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x50027000 0x400>; + reg = <0x50027000 0x4>, <0x500273f0 0x10>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rcc SAI4_R>; + access-controllers = <&etzpc 68>; + status = "disabled"; + + sai4a: audio-controller@50027004 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-a"; + reg = <0x04 0x20>; + clocks = <&rcc SAI4_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 99 0x400 0x01>; + status = "disabled"; + }; + + sai4b: audio-controller@50027024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x20>; + clocks = <&rcc SAI4_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 100 0x400 0x01>; + status = "disabled"; + }; + }; + + hash1: hash@54002000 { + compatible = "st,stm32f756-hash"; + reg = <0x54002000 0x400>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc HASH1>; + resets = <&rcc HASH1_R>; + dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>; + dma-names = "in"; + dma-maxburst = <2>; + access-controllers = <&etzpc 8>; + status = "disabled"; + }; + + rng1: rng@54003000 { + compatible = "st,stm32-rng"; + reg = <0x54003000 0x400>; + clocks = <&rcc RNG1_K>; + resets = <&rcc RNG1_R>; + access-controllers = <&etzpc 7>; + status = "disabled"; + }; + + fmc: memory-controller@58002000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; + clocks = <&rcc FMC_K>; + resets = <&rcc FMC_R>; + access-controllers = <&etzpc 91>; + status = "disabled"; + + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + + nand-controller@4,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>, + <&mdma1 20 0x2 0x12000a08 0x0 0x0>, + <&mdma1 21 0x2 0x12000a0a 0x0 0x0>; + dma-names = "tx", "rx", "ecc"; + status = "disabled"; + }; + }; + + qspi: spi@58003000 { + compatible = "st,stm32f469-qspi"; + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>, + <&mdma1 22 0x2 0x10100008 0x0 0x0>; + dma-names = "tx", "rx"; + clocks = <&rcc QSPI_K>; + resets = <&rcc QSPI_R>; + #address-cells = <1>; + #size-cells = <0>; + access-controllers = <&etzpc 92>; + status = "disabled"; + }; + + ethernet0: ethernet@5800a000 { + compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; + reg = <0x5800a000 0x2000>; + reg-names = "stmmaceth"; + interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clock-names = "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", + "eth-ck", + "ptp_ref", + "ethstp"; + clocks = <&rcc ETHMAC>, + <&rcc ETHTX>, + <&rcc ETHRX>, + <&rcc ETHCK_K>, + <&rcc ETHPTP_K>, + <&rcc ETHSTP>; + st,syscon = <&syscfg 0x4>; + snps,mixed-burst; + snps,pbl = <2>; + snps,en-tx-lpi-clockgating; + snps,axi-config = <&stmmac_axi_config_0>; + snps,tso; + access-controllers = <&etzpc 94>; + status = "disabled"; + + stmmac_axi_config_0: stmmac-axi-config { + snps,wr_osr_lmt = <0x7>; + snps,rd_osr_lmt = <0x7>; + snps,blen = <0 0 0 0 16 8 4>; + }; + }; + + usart1: serial@5c000000 { + compatible = "st,stm32h7-uart"; + reg = <0x5c000000 0x400>; + interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART1_K>; + wakeup-source; + access-controllers = <&etzpc 3>; + status = "disabled"; + }; + + spi6: spi@5c001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x5c001000 0x400>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc SPI6_K>; + resets = <&rcc SPI6_R>; + dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>, + <&mdma1 35 0x0 0x40002 0x0 0x0>; + access-controllers = <&etzpc 4>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2c4: i2c@5c002000 { + compatible = "st,stm32mp15-i2c"; + reg = <0x5c002000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C4_K>; + resets = <&rcc I2C4_R>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-fmp = <&syscfg 0x4 0x8>; + wakeup-source; + i2c-analog-filter; + access-controllers = <&etzpc 5>; + status = "disabled"; + }; + + i2c6: i2c@5c009000 { + compatible = "st,stm32mp15-i2c"; + reg = <0x5c009000 0x400>; + interrupt-names = "event", "error"; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc I2C6_K>; + resets = <&rcc I2C6_R>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-fmp = <&syscfg 0x4 0x20>; + wakeup-source; + i2c-analog-filter; + access-controllers = <&etzpc 12>; + status = "disabled"; + }; }; tamp: tamp@5c00a000 { diff --git a/arch/arm/boot/dts/st/stm32mp153.dtsi b/arch/arm/boot/dts/st/stm32mp153.dtsi index 486084e0b80b..4640dafb1598 100644 --- a/arch/arm/boot/dts/st/stm32mp153.dtsi +++ b/arch/arm/boot/dts/st/stm32mp153.dtsi @@ -28,32 +28,34 @@ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; +}; - soc { - m_can1: can@4400e000 { - compatible = "bosch,m_can"; - reg = <0x4400e000 0x400>, <0x44011000 0x1400>; - reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "int0", "int1"; - clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; - clock-names = "hclk", "cclk"; - bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; - status = "disabled"; - }; +&etzpc { + m_can1: can@4400e000 { + compatible = "bosch,m_can"; + reg = <0x4400e000 0x400>, <0x44011000 0x1400>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; + access-controllers = <&etzpc 62>; + status = "disabled"; + }; - m_can2: can@4400f000 { - compatible = "bosch,m_can"; - reg = <0x4400f000 0x400>, <0x44011000 0x2800>; - reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "int0", "int1"; - clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; - clock-names = "hclk", "cclk"; - bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; - status = "disabled"; - }; + m_can2: can@4400f000 { + compatible = "bosch,m_can"; + reg = <0x4400f000 0x400>, <0x44011000 0x2800>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; + access-controllers = <&etzpc 62>; + status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts index 66ed5f9921ba..9cf5ed111b52 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts @@ -10,6 +10,7 @@ #include "stm32mp15-pinctrl.dtsi" #include "stm32mp15xxaa-pinctrl.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> #include <dt-bindings/mfd/st,stpmic1.h> / { @@ -71,6 +72,17 @@ }; }; + led { + compatible = "gpio-leds"; + led-blue { + gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + function = LED_FUNCTION_HEARTBEAT; + color = <LED_COLOR_ID_BLUE>; + }; + }; + sd_switch: regulator-sd_switch { compatible = "regulator-gpio"; regulator-name = "sd_switch"; diff --git a/arch/arm/boot/dts/st/stm32mp15xc.dtsi b/arch/arm/boot/dts/st/stm32mp15xc.dtsi index b06a55a2fa18..97465717f932 100644 --- a/arch/arm/boot/dts/st/stm32mp15xc.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xc.dtsi @@ -4,15 +4,14 @@ * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. */ -/ { - soc { - cryp1: cryp@54001000 { - compatible = "st,stm32mp1-cryp"; - reg = <0x54001000 0x400>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rcc CRYP1>; - resets = <&rcc CRYP1_R>; - status = "disabled"; - }; +&etzpc { + cryp1: cryp@54001000 { + compatible = "st,stm32mp1-cryp"; + reg = <0x54001000 0x400>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc CRYP1>; + resets = <&rcc CRYP1_R>; + access-controllers = <&etzpc 9>; + status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi b/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi index 790b29ab0fa2..dafe485dfe19 100644 --- a/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi +++ b/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi @@ -256,11 +256,6 @@ pmmc: system-controller@2921c00 { compatible = "ti,k2g-sci"; - /* - * In case of rare platforms that does not use k2g as - * system master, use /delete-property/ - */ - ti,system-reboot-controller; mbox-names = "rx", "tx"; mboxes = <&msgmgr 5 2>, <&msgmgr 0 0>; diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi b/arch/arm/boot/dts/ti/omap/am33xx.dtsi index 989d5a6edeed..0614ffdc1578 100644 --- a/arch/arm/boot/dts/ti/omap/am33xx.dtsi +++ b/arch/arm/boot/dts/ti/omap/am33xx.dtsi @@ -80,7 +80,7 @@ * because the can not be enabled simultaneously on a * single SoC. */ - opp-50-300000000{ + opp-50-300000000 { /* OPP50 */ opp-hz = /bits/ 64 <300000000>; opp-microvolt = <950000 931000 969000>; @@ -88,7 +88,7 @@ opp-suspend; }; - opp-100-275000000{ + opp-100-275000000 { /* OPP100-1 */ opp-hz = /bits/ 64 <275000000>; opp-microvolt = <1100000 1078000 1122000>; @@ -96,7 +96,7 @@ opp-suspend; }; - opp-100-300000000{ + opp-100-300000000 { /* OPP100-2 */ opp-hz = /bits/ 64 <300000000>; opp-microvolt = <1100000 1078000 1122000>; @@ -104,7 +104,7 @@ opp-suspend; }; - opp-100-500000000{ + opp-100-500000000 { /* OPP100-3 */ opp-hz = /bits/ 64 <500000000>; opp-microvolt = <1100000 1078000 1122000>; diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi index 5fd1b380ece6..0a1df30f2818 100644 --- a/arch/arm/boot/dts/ti/omap/am4372.dtsi +++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi @@ -92,7 +92,7 @@ opp-supported-hw = <0xFF 0x08>; }; - opp-800000000{ + opp-800000000 { /* OPP Turbo */ opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1260000 1234800 1285200>; diff --git a/arch/arm/boot/dts/ti/omap/dra76x.dtsi b/arch/arm/boot/dts/ti/omap/dra76x.dtsi index 1045eb24aa0d..50a02c393ea2 100644 --- a/arch/arm/boot/dts/ti/omap/dra76x.dtsi +++ b/arch/arm/boot/dts/ti/omap/dra76x.dtsi @@ -84,35 +84,44 @@ }; &scm_conf_clocks { - dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clocks = <&dpll_gmac_x2_ck>; - ti,max-div = <63>; - reg = <0x03fc>; - ti,bit-shift = <20>; - ti,latch-bit = <26>; - assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>; - assigned-clock-rates = <80000000>; - }; - - dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>; + /* CTRL_CORE_SMA_SW_0 */ + clock@3fc { + compatible = "ti,clksel"; reg = <0x3fc>; - ti,bit-shift = <29>; - ti,latch-bit = <26>; - assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; - assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>; - }; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_gmac_h14x2_ctrl_ck: clock@20 { + reg = <20>; + clock-output-names = "dpll_gmac_h14x2_ctrl_ck"; + compatible = "ti,divider-clock"; + clocks = <&dpll_gmac_x2_ck>; + ti,max-div = <63>; + ti,latch-bit = <26>; + assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>; + assigned-clock-rates = <80000000>; + #clock-cells = <0>; + }; - mcan_clk: mcan_clk@3fc { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; - ti,bit-shift = <27>; - reg = <0x3fc>; + mcan_clk: clock@27 { + reg = <27>; + clock-output-names = "mcan_clk"; + compatible = "ti,gate-clock"; + clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; + #clock-cells = <0>; + }; + + dpll_gmac_h14x2_ctrl_mux_ck: clock@29 { + reg = <29>; + clock-output-names = "dpll_gmac_h14x2_ctrl_mux_ck"; + compatible = "ti,mux-clock"; + clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>; + ti,latch-bit = <26>; + assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; + assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>; + #clock-cells = <0>; + }; }; }; diff --git a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi index 06466d36caa9..04f08b8c64d2 100644 --- a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi @@ -285,13 +285,21 @@ ti,invert-autoidle-bit; }; - dpll_core_byp_mux: clock-dpll-core-byp-mux-23@12c { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_core_byp_mux"; - clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; - ti,bit-shift = <23>; - reg = <0x012c>; + /* CM_CLKSEL_DPLL_CORE */ + clock@12c { + compatible = "ti,clksel"; + reg = <0x12c>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_core_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_core_byp_mux"; + clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; + #clock-cells = <0>; + }; }; dpll_core_ck: clock@120 { @@ -368,13 +376,21 @@ clock-div = <1>; }; - dpll_dsp_byp_mux: clock-dpll-dsp-byp-mux-23@240 { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_dsp_byp_mux"; - clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>; - ti,bit-shift = <23>; - reg = <0x0240>; + /* CM_CLKSEL_DPLL_DSP */ + clock@240 { + compatible = "ti,clksel"; + reg = <0x240>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_dsp_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_dsp_byp_mux"; + clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>; + #clock-cells = <0>; + }; }; dpll_dsp_ck: clock@234 { @@ -410,13 +426,21 @@ clock-div = <1>; }; - dpll_iva_byp_mux: clock-dpll-iva-byp-mux-23@1ac { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_iva_byp_mux"; - clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>; - ti,bit-shift = <23>; - reg = <0x01ac>; + /* CM_CLKSEL_DPLL_IVA */ + clock@1ac { + compatible = "ti,clksel"; + reg = <0x1ac>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_iva_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_iva_byp_mux"; + clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>; + #clock-cells = <0>; + }; }; dpll_iva_ck: clock@1a0 { @@ -452,13 +476,21 @@ clock-div = <1>; }; - dpll_gpu_byp_mux: clock-dpll-gpu-byp-mux-23@2e4 { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_gpu_byp_mux"; - clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; - ti,bit-shift = <23>; - reg = <0x02e4>; + /* CM_CLKSEL_DPLL_GPU */ + clock@2e4 { + compatible = "ti,clksel"; + reg = <0x2e4>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_gpu_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_gpu_byp_mux"; + clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; + #clock-cells = <0>; + }; }; dpll_gpu_ck: clock@2d8 { @@ -506,13 +538,21 @@ clock-div = <1>; }; - dpll_ddr_byp_mux: clock-dpll-ddr-byp-mux-23@21c { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_ddr_byp_mux"; - clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; - ti,bit-shift = <23>; - reg = <0x021c>; + /* CM_CLKSEL_DPLL_DDR */ + clock@21c { + compatible = "ti,clksel"; + reg = <0x21c>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_ddr_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_ddr_byp_mux"; + clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; + #clock-cells = <0>; + }; }; dpll_ddr_ck: clock@210 { @@ -535,13 +575,21 @@ ti,invert-autoidle-bit; }; - dpll_gmac_byp_mux: clock-dpll-gmac-byp-mux-23@2b4 { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_gmac_byp_mux"; - clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; - ti,bit-shift = <23>; - reg = <0x02b4>; + /* CM_CLKSEL_DPLL_GMAC */ + clock@2b4 { + compatible = "ti,clksel"; + reg = <0x2b4>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_gmac_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_gmac_byp_mux"; + clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; + #clock-cells = <0>; + }; }; dpll_gmac_ck: clock@2a8 { @@ -618,13 +666,21 @@ clock-div = <1>; }; - dpll_eve_byp_mux: clock-dpll-eve-byp-mux-23@290 { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_eve_byp_mux"; - clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>; - ti,bit-shift = <23>; - reg = <0x0290>; + /* CM_CLKSEL_DPLL_EVE */ + clock@290 { + compatible = "ti,clksel"; + reg = <0x290>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_eve_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_eve_byp_mux"; + clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>; + #clock-cells = <0>; + }; }; dpll_eve_ck: clock@284 { @@ -838,15 +894,23 @@ clock-div = <1>; }; - l3_iclk_div: clock-l3-iclk-div-4@100 { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clock-output-names = "l3_iclk_div"; - ti,max-div = <2>; - ti,bit-shift = <4>; - reg = <0x0100>; - clocks = <&dpll_core_h12x2_ck>; - ti,index-power-of-two; + /* CM_CLKSEL_CORE */ + clock@100 { + compatible = "ti,clksel"; + reg = <0x100>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + l3_iclk_div: clock@4 { + reg = <4>; + compatible = "ti,divider-clock"; + clock-output-names = "l3_iclk_div"; + ti,max-div = <2>; + clocks = <&dpll_core_h12x2_ck>; + ti,index-power-of-two; + #clock-cells = <0>; + }; }; l4_root_clk_div: clock-l4-root-clk-div { @@ -911,12 +975,21 @@ ti,index-starts-at-one; }; - abe_dpll_sys_clk_mux: clock-abe-dpll-sys-clk-mux@118 { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "abe_dpll_sys_clk_mux"; - clocks = <&sys_clkin1>, <&sys_clkin2>; - reg = <0x0118>; + /* CM_CLKSEL_ABE_PLL_SYS */ + clock@118 { + compatible = "ti,clksel"; + reg = <0x118>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + abe_dpll_sys_clk_mux: clock@0 { + reg = <0>; + compatible = "ti,mux-clock"; + clock-output-names = "abe_dpll_sys_clk_mux"; + clocks = <&sys_clkin1>, <&sys_clkin2>; + #clock-cells = <0>; + }; }; abe_dpll_bypass_clk_mux: clock-abe-dpll-bypass-clk-mux@114 { @@ -1018,14 +1091,23 @@ ti,index-power-of-two; }; - dsp_gclk_div: clock-dsp-gclk-div@18c { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clock-output-names = "dsp_gclk_div"; - clocks = <&dpll_dsp_m2_ck>; - ti,max-div = <64>; - reg = <0x018c>; - ti,index-power-of-two; + /* CM_CLKSEL_DPLL_USB */ + clock@18c { + compatible = "ti,clksel"; + reg = <0x18c>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dsp_gclk_div: clock@0 { + reg = <0>; + compatible = "ti,divider-clock"; + clock-output-names = "dsp_gclk_div"; + clocks = <&dpll_dsp_m2_ck>; + ti,max-div = <64>; + ti,index-power-of-two; + #clock-cells = <0>; + }; }; gpu_dclk: clock-gpu-dclk@1a0 { @@ -1326,13 +1408,21 @@ clock-div = <1>; }; - dpll_per_byp_mux: clock-dpll-per-byp-mux-23@14c { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_per_byp_mux"; - clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>; - ti,bit-shift = <23>; - reg = <0x014c>; + /* CM_CLKSEL_DPLL_PER */ + clock@14c { + compatible = "ti,clksel"; + reg = <0x14c>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_per_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_per_byp_mux"; + clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>; + #clock-cells = <0>; + }; }; dpll_per_ck: clock@140 { @@ -1364,13 +1454,21 @@ clock-div = <1>; }; - dpll_usb_byp_mux: clock-dpll-usb-byp-mux-23@18c { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clock-output-names = "dpll_usb_byp_mux"; - clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>; - ti,bit-shift = <23>; - reg = <0x018c>; + /* CM_CLKSEL_DPLL_USB */ + clock@18c { + compatible = "ti,clksel"; + reg = <0x18c>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + + dpll_usb_byp_mux: clock@23 { + reg = <23>; + compatible = "ti,mux-clock"; + clock-output-names = "dpll_usb_byp_mux"; + clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>; + #clock-cells = <0>; + }; }; dpll_usb_ck: clock@180 { diff --git a/arch/arm/boot/dts/ti/omap/omap3-n900.dts b/arch/arm/boot/dts/ti/omap/omap3-n900.dts index d33485341251..07c5b963af78 100644 --- a/arch/arm/boot/dts/ti/omap/omap3-n900.dts +++ b/arch/arm/boot/dts/ti/omap/omap3-n900.dts @@ -754,7 +754,7 @@ ti,current-limit = <100>; ti,weak-battery-voltage = <3400>; ti,battery-regulation-voltage = <4200>; - ti,charge-current = <650>; + ti,charge-current = <950>; ti,termination-current = <100>; ti,resistor-sense = <68>; |