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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-12-03 09:33:56 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-12-12 02:24:42 +0300 |
| commit | 618a43eaea14cb4f6526a4e93c6b791778d160b0 (patch) | |
| tree | 9d8abfb9faf84db64546ca08ba70d65dbb2b41c7 /arch/arm | |
| parent | 1a7022f181ec40d0f63ab3ea7f196e330e59dc47 (diff) | |
| download | linux-618a43eaea14cb4f6526a4e93c6b791778d160b0.tar.xz | |
ARM: dts: uniphier: change IRQ number of UART3 of PH1-Pro4 SoC
The UART3 is assigned with IRQ 29 for old SoCs, IRQ 177 for new ones,
and PH1-Pro4 is on the boundary.
PH1-sLD3: UART3 is unavailable
PH1-LD4, PH1-sLD8: only IRQ 29 is supported
PH1-Pro4: both IRQ 29 and 177 are supported
PH1-Pro5, ProXstream2, PH1-LD6b: only IRQ 177 is supported
This SoC can choose either IRQ 29 or IRQ 177, but the former is shared
with another hardware (low speed serial0). The latter is dedicated
for this hardware and more recommended.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-ph1-pro4.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi index 254642fe0e71..bbf37273bb73 100644 --- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi @@ -151,7 +151,7 @@ reg = <0x54006b00 0x40>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; - interrupts = <0 29 4>; + interrupts = <0 177 4>; clocks = <&uart_clk>; fifo-size = <64>; }; |