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| author | Zhenyu Ye <yezhenyu2@huawei.com> | 2020-07-15 10:19:43 +0300 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2020-07-15 17:57:30 +0300 |
| commit | b620ba54547cd0f98e35c1be102eec2cc25fda5d (patch) | |
| tree | 5057a6279d2dd70d506c1297dcc279a9e651ce65 /arch/arm64/kernel | |
| parent | 61c11656b67b0a30f702f240aabe81fd93e702ac (diff) | |
| download | linux-b620ba54547cd0f98e35c1be102eec2cc25fda5d.tar.xz | |
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses. This patch detect this feature.
Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
Link: https://lore.kernel.org/r/20200715071945.897-2-yezhenyu2@huawei.com
[catalin.marinas@arm.com: some renaming for consistency]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
| -rw-r--r-- | arch/arm64/kernel/cpufeature.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index e877f56ff1ab..2f5adefef34d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1893,6 +1893,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .min_field_value = 1, .matches = has_cpuid_feature, }, + { + .desc = "TLB range maintenance instructions", + .capability = ARM64_HAS_TLB_RANGE, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .matches = has_cpuid_feature, + .sys_reg = SYS_ID_AA64ISAR0_EL1, + .field_pos = ID_AA64ISAR0_TLB_SHIFT, + .sign = FTR_UNSIGNED, + .min_field_value = ID_AA64ISAR0_TLB_RANGE, + }, #ifdef CONFIG_ARM64_HW_AFDBM { /* |