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authorMarc Zyngier <maz@kernel.org>2021-03-10 16:25:57 +0300
committerMarc Zyngier <maz@kernel.org>2021-03-18 18:51:07 +0300
commit45879a57751d272ced9ed5ccfd28c58e2095ceb7 (patch)
treebcffd493d66115a61808fabc119cf27f689742dd /arch/arm64/kernel/cpu-reset.S
parent1e28eed17697bcf343c6743f0028cc3b5dd88bf0 (diff)
downloadlinux-45879a57751d272ced9ed5ccfd28c58e2095ceb7.tar.xz
arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart
Instead of doing a RMW on SCTLR_EL1 to disable the MMU, use the existing define that loads the right set of bits. Acked-by: Will Deacon <will@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/kernel/cpu-reset.S')
-rw-r--r--arch/arm64/kernel/cpu-reset.S5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S
index 37721eb6f9a1..d47ff63a5b66 100644
--- a/arch/arm64/kernel/cpu-reset.S
+++ b/arch/arm64/kernel/cpu-reset.S
@@ -30,10 +30,7 @@
* flat identity mapping.
*/
SYM_CODE_START(__cpu_soft_restart)
- /* Clear sctlr_el1 flags. */
- mrs x12, sctlr_el1
- mov_q x13, SCTLR_ELx_FLAGS
- bic x12, x12, x13
+ mov_q x12, INIT_SCTLR_EL1_MMU_OFF
pre_disable_mmu_workaround
/*
* either disable EL1&0 translation regime or disable EL2&0 translation