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| author | Will Deacon <will.deacon@arm.com> | 2018-06-14 13:21:34 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-12-06 19:47:04 +0300 |
| commit | bd4fb6d270bc423a9a4098108784f7f9254c4e6d (patch) | |
| tree | b795cee624fd00a3274c5d6efd89df71288cf1ff /arch/arm64/include/uapi/asm/hwcap.h | |
| parent | 0b587c84e42151fc5a636c7cebf7b03b281dc672 (diff) | |
| download | linux-bd4fb6d270bc423a9a4098108784f7f9254c4e6d.tar.xz | |
arm64: Add support for SB barrier and patch in over DSB; ISB sequences
We currently use a DSB; ISB sequence to inhibit speculation in set_fs().
Whilst this works for current CPUs, future CPUs may implement a new SB
barrier instruction which acts as an architected speculation barrier.
On CPUs that support it, patch in an SB; NOP sequence over the DSB; ISB
sequence and advertise the presence of the new instruction to userspace.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/uapi/asm/hwcap.h')
| -rw-r--r-- | arch/arm64/include/uapi/asm/hwcap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h index 2bcd6e4f3474..7784f7cba16c 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -49,5 +49,6 @@ #define HWCAP_ILRCPC (1 << 26) #define HWCAP_FLAGM (1 << 27) #define HWCAP_SSBS (1 << 28) +#define HWCAP_SB (1 << 29) #endif /* _UAPI__ASM_HWCAP_H */ |