diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-01-14 14:11:17 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-01-14 14:13:00 +0300 |
| commit | dfacaef96cbf871be23b4e2613818a9658f23817 (patch) | |
| tree | 4e1f70ae966c45adbb30db35acfb17a128130d5f /arch/arm64/boot/dts | |
| parent | 73feebad9e056cfe5f444acd5b61f3d0d5ec74bb (diff) | |
| download | linux-dfacaef96cbf871be23b4e2613818a9658f23817.tar.xz | |
arm64: dts: renesas: r8a779a0: Add GPIO nodes
Add device nodes for the General Purpose Input/Output (GPIO) block on
the Renesas R-Car V3U (r8a779a0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210114111117.2214281-1-geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 140 |
1 files changed, 140 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index 6ac2c9d37acd..66b47a848443 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -89,6 +89,146 @@ <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; }; + gpio0: gpio@e6058180 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6058180 0 0x54>; + interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 916>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 916>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 0 28>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@e6050180 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6050180 0 0x54>; + interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 915>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 915>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 32 31>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@e6050980 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6050980 0 0x54>; + interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 915>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 915>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 64 25>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@e6058980 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6058980 0 0x54>; + interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 916>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 916>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 96 17>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@e6060180 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6060180 0 0x54>; + interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 917>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 128 27>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio5: gpio@e6060980 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6060980 0 0x54>; + interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 917>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 160 21>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio6: gpio@e6068180 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6068180 0 0x54>; + interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 918>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 918>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 192 21>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio7: gpio@e6068980 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6068980 0 0x54>; + interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 918>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 918>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 224 21>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio8: gpio@e6069180 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6069180 0 0x54>; + interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 918>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 918>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 256 21>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio9: gpio@e6069980 { + compatible = "renesas,gpio-r8a779a0"; + reg = <0 0xe6069980 0 0x54>; + interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 918>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 918>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 288 21>; + interrupt-controller; + #interrupt-cells = <2>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a779a0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; |