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authorKefeng Wang <wangkefeng.wang@huawei.com>2016-01-29 11:39:02 +0300
committerWei Xu <xuwei5@hisilicon.com>2016-02-25 16:15:58 +0300
commit6897db62bbb322124ee7a5ee527134cde76d4aa1 (patch)
tree2eab9f0af5736ddea43e17a70d5160c937fbcd0c /arch/arm64/boot/dts
parentdbb58d0f79207d35f298b619a87fb81dbcae788d (diff)
downloadlinux-6897db62bbb322124ee7a5ee527134cde76d4aa1.tar.xz
arm64: dts: hip05: Use Cortex specific device node for pmu
Instead of using the generic armv8-pmuv3 compatibility, use the more specific Cortex A57 compatibility. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip05.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index db2039d4cfda..ed31f1967687 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -262,7 +262,7 @@
};
pmu {
- compatible = "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};