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authorSean Anderson <sean.anderson@seco.com>2022-01-27 23:06:35 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-02-08 19:28:12 +0300
commitd8b1c3d0d700f7995607fde333a992de28636178 (patch)
treed1a5b94fe756ff7d8bfc43ffddb5be80c9f00f12 /arch/arm64/boot/dts/xilinx/zynqmp.dtsi
parent596c87856e08d6461686435aacecca2282ef3acc (diff)
downloadlinux-d8b1c3d0d700f7995607fde333a992de28636178.tar.xz
arm64: dts: zynqmp: Move USB clocks to dwc3 node
These clocks are not used by the dwc3-xilinx driver except to enable/disable them. Move them to the dwc3 node so its driver can use them to configure the reference clock period. Tested-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Link: https://lore.kernel.org/r/20220127200636.1456175-7-sean.anderson@seco.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp.dtsi')
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 74e66443e4ce..ba68fb8529ee 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -811,7 +811,6 @@
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
- clock-names = "bus_clk", "ref_clk";
power-domains = <&zynqmp_firmware PD_USB_0>;
resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
<&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
@@ -825,6 +824,7 @@
interrupt-parent = <&gic>;
interrupt-names = "dwc_usb3", "otg";
interrupts = <0 65 4>, <0 69 4>;
+ clock-names = "bus_early", "ref";
#stream-id-cells = <1>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
@@ -838,7 +838,6 @@
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
- clock-names = "bus_clk", "ref_clk";
power-domains = <&zynqmp_firmware PD_USB_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
<&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
@@ -852,6 +851,7 @@
interrupt-parent = <&gic>;
interrupt-names = "dwc_usb3", "otg";
interrupts = <0 70 4>, <0 74 4>;
+ clock-names = "bus_early", "ref";
#stream-id-cells = <1>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;