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authorSimon Xue <xxm@rock-chips.com>2021-07-05 04:26:10 +0300
committerHeiko Stuebner <heiko@sntech.de>2021-09-15 18:50:18 +0300
commit2076121eecc18fa31ae749c6ddc5648be96f0b5e (patch)
tree9b6d26ae44df575a6fe006c170070f4111ea3b89 /arch/arm64/boot/dts/rockchip/rk3568.dtsi
parente97afba3282bcf46ad42c0cd5c53a87d1c055337 (diff)
downloadlinux-2076121eecc18fa31ae749c6ddc5648be96f0b5e.tar.xz
arm64: dts: rockchip: add saradc node for rk3568
Add the core dt-node for the rk3568's saradc. Signed-off-by: Simon Xue <xxm@rock-chips.com> Link: https://lore.kernel.org/r/20210705012610.3831-1-xxm@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3568.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3568.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 618849186c39..11825909c5db 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -754,6 +754,18 @@
status = "disabled";
};
+ saradc: saradc@fe720000 {
+ compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
+ reg = <0x0 0xfe720000 0x0 0x100>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ resets = <&cru SRST_P_SARADC>;
+ reset-names = "saradc-apb";
+ #io-channel-cells = <1>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3568-pinctrl";
rockchip,grf = <&grf>;