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authorJagan Teki <jagan@amarulasolutions.com>2020-07-15 11:34:15 +0300
committerHeiko Stuebner <heiko@sntech.de>2020-07-18 18:06:13 +0300
commita66bd94d0eac017e4846658750acaca2937555bb (patch)
tree23d5992aaa9cd7a047d6d817874029874436b787 /arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
parent4a3ca113c0f3a2ce33e51fc6a48a121b2d707d4f (diff)
downloadlinux-a66bd94d0eac017e4846658750acaca2937555bb.tar.xz
arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier
Some of gmac, sdmmc node properties are common across rk3288 and rk3399pro SOM's so move them into Carrier dtsi. Chosen node is specific to rk3399pro configure SBC, so move it into RockPI N10 dts. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi21
1 files changed, 5 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index d8fa8127d9dc..37ed95d5f7e9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -11,13 +11,6 @@
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
};
&cpu_l0 {
@@ -42,17 +35,8 @@
&gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
};
&i2c0 {
@@ -335,6 +319,11 @@
status = "okay";
};
+&sdmmc {
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ max-frequency = <150000000>;
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;