diff options
| author | Valentine Barshak <valentine.barshak@cogentembedded.com> | 2021-05-04 12:14:34 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-05-25 10:55:52 +0300 |
| commit | e9550a536e3edd23b88926a6fb27fa200b56dfa9 (patch) | |
| tree | 550e4f60e8eaa74d4ae6c20c8db274da9ab52937 /arch/arm64/boot/dts/renesas | |
| parent | 8c10e004dfb94e93f1ac76da47c27b96c9de94ef (diff) | |
| download | linux-e9550a536e3edd23b88926a6fb27fa200b56dfa9.tar.xz | |
arm64: dts: renesas: eagle: Add x1 clock
This adds X1 clock which supplies a frequency of 148.5 MHz.
This clock is connected to the external dot clock input signal.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
[geert: Verified schematics]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/75a66bae21937da1c69e8024ce61b35aad4ac9b8.1620119570.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts index 874a7fc2730b..5c84681703ed 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts @@ -73,6 +73,12 @@ /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; + + x1_clk: x1-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; }; &avb { @@ -104,6 +110,8 @@ }; &du { + clocks = <&cpg CPG_MOD 724>, <&x1_clk>; + clock-names = "du.0", "dclkin.0"; status = "okay"; }; |