diff options
| author | Rajendra Nayak <rnayak@codeaurora.org> | 2020-07-03 12:41:33 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-07-14 02:16:12 +0300 |
| commit | a24ad4878c6bd6c71968fff764fce31f9863b136 (patch) | |
| tree | 4b340a45c87e4e84caff5e0a9586572af55f1643 /arch/arm64/boot/dts/qcom/sc7180.dtsi | |
| parent | 5b4de2f8b51b0268b7eb778fa160fc0a88ec6e72 (diff) | |
| download | linux-a24ad4878c6bd6c71968fff764fce31f9863b136.tar.xz | |
arm64: dts: sc7180: Add qspi opps and power-domains
Add the power domain supporting performance state and the corresponding
OPP tables for the qspi device on sc7180
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1593769293-6354-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 2be81a2a1512..34a6d833f014 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2407,6 +2407,25 @@ status = "disabled"; }; + qspi_opp_table: qspi-opp-table { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-150000000 { + opp-hz = /bits/ 64 <150000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + qspi: spi@88dc000 { compatible = "qcom,qspi-v1"; reg = <0 0x088dc000 0 0x600>; @@ -2419,6 +2438,8 @@ interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QSPI_0>; interconnect-names = "qspi-config"; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qspi_opp_table>; status = "disabled"; }; |