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| author | Bhupesh Sharma <bhupesh.sharma@linaro.org> | 2022-05-15 00:54:22 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-07-03 06:17:02 +0300 |
| commit | 4ff12270dbbe245cf92c0247bcc1a2bfbc03639c (patch) | |
| tree | 22511fbd4c5fcec020a3563bc4f7bbcf2058178c /arch/arm64/boot/dts/qcom/msm8916.dtsi | |
| parent | 40940823cb582acc13f5fda5688a5287893b3281 (diff) | |
| download | linux-4ff12270dbbe245cf92c0247bcc1a2bfbc03639c.tar.xz | |
arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names' for sdhci nodes
Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports a number of issues with
ordering of 'clocks' & 'clock-names' for sdhci nodes:
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
clock-names:2: 'xo' was expected
Fix the same by updating the offending 'dts' files.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index a5d320317146..09f76d727cac 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1472,10 +1472,10 @@ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_SDCC1_AHB_CLK>, + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, <&xo_board>; - clock-names = "core", "iface", "xo"; + clock-names = "iface", "core", "xo"; mmc-ddr-1_8v; bus-width = <8>; non-removable; @@ -1490,10 +1490,10 @@ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC2_APPS_CLK>, - <&gcc GCC_SDCC2_AHB_CLK>, + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, <&xo_board>; - clock-names = "core", "iface", "xo"; + clock-names = "iface", "core", "xo"; bus-width = <4>; status = "disabled"; }; |