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authorMarc Zyngier <maz@kernel.org>2020-10-05 16:32:56 +0300
committerThierry Reding <treding@nvidia.com>2020-11-25 17:33:33 +0300
commit776a3c04da9fa144241476f4a0d263899d6cad26 (patch)
tree518ee56f7161ff6ed46f77e209105541390e1b7b /arch/arm64/boot/dts/nvidia
parent3b4c137856d94f94231415793f45a104a19c3604 (diff)
downloadlinux-776a3c04da9fa144241476f4a0d263899d6cad26.tar.xz
arm64: tegra: Fix GIC400 missing GICH/GICV register regions
GIC400 has full support for virtualization, and yet the tegra186 DT doesn't expose the GICH/GICV regions (despite exposing the maintenance interrupt that only makes sense for virtualization). Add the missing regions, based on the hunch that the HW doesn't use the CPU build-in interfaces, but instead the external ones provided by the GIC. KVM's virtual GIC now works with this change. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186.dtsi4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index a55d7ac95323..98544d16d01b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -845,7 +845,9 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x03881000 0x0 0x1000>,
- <0x0 0x03882000 0x0 0x2000>;
+ <0x0 0x03882000 0x0 0x2000>,
+ <0x0 0x03884000 0x0 0x2000>,
+ <0x0 0x03886000 0x0 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-parent = <&gic>;