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| author | Trevor Wu <trevor.wu@mediatek.com> | 2022-08-11 05:58:10 +0300 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2022-08-25 17:48:31 +0300 |
| commit | 04cd978316c992711f341b0c91fdb44f2c21836b (patch) | |
| tree | ef093678f5717bc34f4665dc9f445a9eb13bc143 /arch/arm64/boot/dts/mediatek | |
| parent | 7dd5bc578974a96025cb120012706bb4bf4e41fc (diff) | |
| download | linux-04cd978316c992711f341b0c91fdb44f2c21836b.tar.xz | |
arm64: dts: mt8195: Specify audio reset controller
Specify audio reset controller for audio hardware resetting.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220811025813.21492-18-tinghan.shen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index f42d33414125..9c14c42f0713 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -680,6 +680,7 @@ "mediatek,mt6589-wdt"; mediatek,disable-extrst; reg = <0 0x10007000 0 0x100>; + #reset-cells = <1>; }; apmixedsys: syscon@1000c000 { @@ -782,6 +783,8 @@ mediatek,topckgen = <&topckgen>; power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>; interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>; + resets = <&watchdog 14>; + reset-names = "audiosys"; clocks = <&clk26m>, <&apmixedsys CLK_APMIXED_APLL1>, <&apmixedsys CLK_APMIXED_APLL2>, |