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| author | Ingo Molnar <mingo@kernel.org> | 2023-02-23 11:16:39 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2023-02-23 11:16:39 +0300 |
| commit | 585a78c1f77be305b1f6adad392f16047fb66ffd (patch) | |
| tree | 765143b487d582832c7695c9fbcae141c35baa4c /arch/arm64/boot/dts/mediatek/mt6795.dtsi | |
| parent | 37064583f63eca93c98a9cdf2360485ea05f617a (diff) | |
| parent | 69308402ca6f5b80a5a090ade0b13bd146891420 (diff) | |
| download | linux-585a78c1f77be305b1f6adad392f16047fb66ffd.tar.xz | |
Merge branch 'linus' into objtool/core, to pick up Xen dependencies
Pick up dependencies - freshly merged upstream via xen-next - before applying
dependent objtool changes.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt6795.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt6795.dtsi | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index bb575837e4ce..b3fc76d837a9 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -40,6 +40,12 @@ enable-method = "psci"; reg = <0x001>; cci-control-port = <&cci_control2>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_0>; }; @@ -49,6 +55,12 @@ enable-method = "psci"; reg = <0x002>; cci-control-port = <&cci_control2>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_0>; }; @@ -58,6 +70,12 @@ enable-method = "psci"; reg = <0x003>; cci-control-port = <&cci_control2>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_0>; }; @@ -67,6 +85,12 @@ enable-method = "psci"; reg = <0x100>; cci-control-port = <&cci_control1>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_1>; }; @@ -76,6 +100,12 @@ enable-method = "psci"; reg = <0x101>; cci-control-port = <&cci_control1>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_1>; }; @@ -85,6 +115,12 @@ enable-method = "psci"; reg = <0x102>; cci-control-port = <&cci_control1>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_1>; }; @@ -94,6 +130,12 @@ enable-method = "psci"; reg = <0x103>; cci-control-port = <&cci_control1>; + i-cache-size = <32768>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <32768>; + d-cache-line-size = <64>; + d-cache-sets = <128>; next-level-cache = <&l2_1>; }; @@ -138,11 +180,19 @@ l2_0: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-size = <1048576>; + cache-line-size = <64>; + cache-sets = <1024>; + cache-unified; }; l2_1: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-size = <1048576>; + cache-line-size = <64>; + cache-sets = <1024>; + cache-unified; }; }; |