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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2016-04-26 10:58:33 +0300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2016-04-26 16:09:02 +0300 |
| commit | bb233a9319ea1999d637a9c7e6c3c4a578a1fc94 (patch) | |
| tree | 41eba0b689f986180f248084d622448174ea53b3 /arch/arm64/boot/dts/marvell/armada-ap806.dtsi | |
| parent | bf151162162b21e27fd9e94776aac67f648c0c4c (diff) | |
| download | linux-bb233a9319ea1999d637a9c7e6c3c4a578a1fc94.tar.xz | |
arm64: dts: marvell: use new clock binding on Armada AP806
This commit updates the Marvell AP806 Device Tree description to make
use of the accepted clock Device Tree binding.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-ap806.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 34 |
1 files changed, 12 insertions, 22 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 9e2c1f9e78bc..38be1928f550 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -179,7 +179,7 @@ #size-cells = <0>; cell-index = <0>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ringclk 2>; + clocks = <&ap_syscon 3>; status = "disabled"; }; @@ -190,7 +190,7 @@ #size-cells = <0>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; timeout-ms = <1000>; - clocks = <&ringclk 2>; + clocks = <&ap_syscon 3>; status = "disabled"; }; @@ -200,7 +200,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&ringclk 2>; + clocks = <&ap_syscon 3>; status = "disabled"; }; @@ -210,29 +210,19 @@ reg-shift = <2>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&ringclk 2>; + clocks = <&ap_syscon 3>; status = "disabled"; }; - dfx-server@6f8000 { - compatible = "simple-mfd", "syscon"; - reg = <0x6f8000 0x70000>; - - coreclk: clk@204 { - compatible = "marvell,armada-ap806-core-clock"; - #clock-cells = <1>; - clock-output-names = "ddr", "ring", "cpu"; - }; - - ringclk: clk@250 { - compatible = "marvell,armada-ap806-ring-clock"; - #clock-cells = <1>; - clock-output-names = "ring-0", "ring-2", - "ring-3", "ring-4", - "ring-5"; - clocks = <&coreclk 1>; - }; + ap_syscon: system-controller@6f4000 { + compatible = "marvell,ap806-system-controller", + "syscon"; + #clock-cells = <1>; + clock-output-names = "ap-cpu-cluster-0", + "ap-cpu-cluster-1", + "ap-fixed", "ap-mss"; + reg = <0x6f4000 0x1000>; }; }; }; |