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author | Kefeng Wang <wangkefeng.wang@huawei.com> | 2016-09-24 12:14:23 +0300 |
---|---|---|
committer | Wei Xu <xuwei5@hisilicon.com> | 2016-11-15 13:36:17 +0300 |
commit | 4f357f94e13d92e514be291fc71ddf154c3b6c62 (patch) | |
tree | 561cad978b2ed32ae0f6cf6b739369e5db48f196 /arch/arm64/boot/dts/hisilicon/Makefile | |
parent | 2c6aa008b84ca451800295f1698faa8106ce2882 (diff) | |
download | linux-4f357f94e13d92e514be291fc71ddf154c3b6c62.tar.xz |
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.
Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/Makefile')
-rw-r--r-- | arch/arm64/boot/dts/hisilicon/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile index d5f43a06b1c1..c8b8f803cf90 100644 --- a/arch/arm64/boot/dts/hisilicon/Makefile +++ b/arch/arm64/boot/dts/hisilicon/Makefile @@ -1,6 +1,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb +dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb always := $(dtb-y) subdir-y := $(dts-dirs) |