diff options
| author | Peng Fan <peng.fan@nxp.com> | 2022-06-22 09:14:03 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-06-27 10:55:14 +0300 |
| commit | 8c214b78e149dc7209e38a031292fe21d7017561 (patch) | |
| tree | ff4372b80b1e9dd8330aa4b5b994f3168fa07197 /arch/arm64/boot/dts/freescale | |
| parent | 95587ecfcf25e1b9e7810ed91df084d823ee8023 (diff) | |
| download | linux-8c214b78e149dc7209e38a031292fe21d7017561.tar.xz | |
arm64: dts: imx8mp-evk: correct I2C5 pad settings
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Although function is not broken, we should not set reserved bit.
Fixes: 8134822db08d ("arm64: dts: imx8mp-evk: add support for I2C5")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index c244a5cd1ac0..b2fd0af5d1e1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -481,8 +481,8 @@ pinctrl_i2c5: i2c5grp { fsl,pins = < - MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c3 - MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c3 + MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c2 + MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c2 >; }; |