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authorAlice Guo <alice.guo@nxp.com>2021-01-04 12:15:43 +0300
committerShawn Guo <shawnguo@kernel.org>2021-01-11 05:45:34 +0300
commitcbff23797fa1ec00e3bdda57d8472f75c0b7aab9 (patch)
tree7fa9c9741361752a010c4b14a78a72a49ecef94c /arch/arm64/boot/dts/freescale/imx8mm.dtsi
parentce58459d8c7f4174e7b8a8ea903dd949631334a3 (diff)
downloadlinux-cbff23797fa1ec00e3bdda57d8472f75c0b7aab9.tar.xz
arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID
In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index d457ce815e68..9bee6f1889a4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -261,6 +261,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mm_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -518,6 +520,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mm_uid: unique-id@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};