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| author | Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com> | 2018-11-14 08:30:52 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-12-08 05:28:38 +0300 |
| commit | 8897f3255c9c411b86482e09ccbc3e75a8a201e7 (patch) | |
| tree | dc4f3c368411ceb234c2221813bac736702fceae /arch/arm64/boot/dts/freescale/Makefile | |
| parent | 1fa35bc09d48de9dbbadf11e667adced9e461131 (diff) | |
| download | linux-8897f3255c9c411b86482e09ccbc3e75a8a201e7.tar.xz | |
arm64: dts: Add support for NXP LS1028A SoC
LS1028A contains two ARM v8 CortexA72 processor cores
with 32 KB L1-D cache and 48 KB L1-I cache
Features summary
Two 32-bit / 64-bit ARM v8 Cortex-A72 CPUs
- Arranged as single clusters of two cores sharing a 1 MB L2 cache
- Speed Up to 1.3 GHz
- Support for cluster power-gating.
Cache coherent interconnect (CCI-400)
- Hardware-managed data coherency
- Up to 400 MHz
32-bit DDR4 SDRAM memory controller with ECC
Two PCIe 3.0 controllers
One serial ATA (SATA 3.0) controller
Two high-speed USB 3.0 controllers with integrated PHY
Following levels of DTSI/DTS files have been created for the LS1028A
SoC family:
- fsl-ls1028a.dtsi:
DTS-Include file for NXP LS1028A SoC.
- fsl-ls1028a-qds.dts:
DTS file for NXP LS1028A QDS board.
- fsl-ls1028a-rdb.dts:
DTS file for NXP LS1028A RDB board
Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/Makefile')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 9a88530c5f38..7748e6dfc3c9 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -3,6 +3,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb |