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authorYixun Lan <yixun.lan@amlogic.com>2018-03-28 06:01:30 +0300
committerKevin Hilman <khilman@baylibre.com>2018-05-23 21:31:54 +0300
commit9adda3534faad306c3d5351c5b87d26fea9767be (patch)
treed0b5373da6e31b4abb8707b69b3049691c6f8087 /arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
parente03421ece6a6044c498e3f952c41b0d99d7ca51a (diff)
downloadlinux-9adda3534faad306c3d5351c5b87d26fea9767be.tar.xz
ARM64: dts: meson: fix clock source of the pclk for UART_AO
>From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi')
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 1cbb0829b15d..98cbba6809ca 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -751,12 +751,12 @@
};
&uart_AO {
- clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+ clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO_B {
- clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+ clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};