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authorMaxime Ripard <maxime.ripard@bootlin.com>2019-08-21 17:38:35 +0300
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-08-23 13:02:07 +0300
commit9e1975f0bca9ef9fc5d76f056cab7240e25bca76 (patch)
tree4eb9785506dee33341a0f8908850827efec906a7 /arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
parent89d1e51462d4749874ba3505c7de46734fda82f1 (diff)
downloadlinux-9e1975f0bca9ef9fc5d76f056cab7240e25bca76.tar.xz
ARM: dts: sunxi: Add missing watchdog clocks
The watchdog has a clock on all our SoCs, but it wasn't always listed. Add it to the devicetree where it's missing. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 67f920e0fc33..4020a1aafa3e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -217,6 +217,7 @@
"allwinner,sun6i-a31-wdt";
reg = <0x030090a0 0x20>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
/* Broken on some H6 boards */
status = "disabled";
};
@@ -727,6 +728,7 @@
"allwinner,sun6i-a31-wdt";
reg = <0x07020400 0x20>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
};
r_intc: interrupt-controller@7021000 {