diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2020-08-06 21:20:37 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-19 22:40:14 +0300 |
| commit | 0144e3fce3d601561fb51d0362316ca745c830df (patch) | |
| tree | cc6f08d2d815bab5cbc35a5684cbc53ce03c0565 /arch/arm/plat-samsung | |
| parent | a07c4a8c169bc072cceeda1c98a7c37fdde498a3 (diff) | |
| download | linux-0144e3fce3d601561fb51d0362316ca745c830df.tar.xz | |
ARM: s3c24xx: move regs-spi.h into spi driver
The file is mostly specific to the driver, the few bits that
are actually used by the platform code get moved to mach/map.h
instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-20-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/plat-samsung')
| -rw-r--r-- | arch/arm/plat-samsung/devs.c | 1 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-spi.h | 44 |
2 files changed, 0 insertions, 45 deletions
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 0607d2984841..0ed3a4b9fc12 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -61,7 +61,6 @@ #include <linux/platform_data/usb-s3c2410_udc.h> #include <linux/platform_data/usb-ohci-s3c2410.h> #include <plat/usb-phy.h> -#include <plat/regs-spi.h> #include <linux/platform_data/asoc-s3c.h> #include <linux/platform_data/spi-s3c64xx.h> diff --git a/arch/arm/plat-samsung/include/plat/regs-spi.h b/arch/arm/plat-samsung/include/plat/regs-spi.h deleted file mode 100644 index 607844311566..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-spi.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Fetron GmbH - * - * S3C2410 SPI register definition - */ - -#ifndef __ASM_ARCH_REGS_SPI_H -#define __ASM_ARCH_REGS_SPI_H - -#define S3C2410_SPI1 (0x20) -#define S3C2412_SPI1 (0x100) - -#define S3C2410_SPCON (0x00) - -#define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */ -#define S3C2410_SPCON_SMOD_INT (1 << 5) /* interrupt mode */ -#define S3C2410_SPCON_SMOD_POLL (0 << 5) /* polling mode */ -#define S3C2410_SPCON_ENSCK (1 << 4) /* Enable SCK */ -#define S3C2410_SPCON_MSTR (1 << 3) /* Master:1, Slave:0 select */ -#define S3C2410_SPCON_CPOL_HIGH (1 << 2) /* Clock polarity select */ -#define S3C2410_SPCON_CPOL_LOW (0 << 2) /* Clock polarity select */ - -#define S3C2410_SPCON_CPHA_FMTB (1 << 1) /* Clock Phase Select */ -#define S3C2410_SPCON_CPHA_FMTA (0 << 1) /* Clock Phase Select */ - -#define S3C2410_SPSTA (0x04) - -#define S3C2410_SPSTA_DCOL (1 << 2) /* Data Collision Error */ -#define S3C2410_SPSTA_MULD (1 << 1) /* Multi Master Error */ -#define S3C2410_SPSTA_READY (1 << 0) /* Data Tx/Rx ready */ -#define S3C2412_SPSTA_READY_ORG (1 << 3) - -#define S3C2410_SPPIN (0x08) - -#define S3C2410_SPPIN_ENMUL (1 << 2) /* Multi Master Error detect */ -#define S3C2410_SPPIN_RESERVED (1 << 1) -#define S3C2410_SPPIN_KEEP (1 << 0) /* Master Out keep */ - -#define S3C2410_SPPRE (0x0C) -#define S3C2410_SPTDAT (0x10) -#define S3C2410_SPRDAT (0x14) - -#endif /* __ASM_ARCH_REGS_SPI_H */ |