summaryrefslogtreecommitdiff
path: root/arch/arm/mach-zynq/include
diff options
context:
space:
mode:
authorJosh Cartwright <josh.cartwright@ni.com>2012-10-22 06:15:37 +0400
committerMichal Simek <michal.simek@xilinx.com>2012-10-29 11:54:56 +0400
commitf58007762f537ba13674a3138b3f4c20fff1cba9 (patch)
treea88498fd3c86be7ca74ce90d9a0bf6f8e7febeab /arch/arm/mach-zynq/include
parentf7977939e956bdf6558ae6f4b743653db9f5c291 (diff)
downloadlinux-f58007762f537ba13674a3138b3f4c20fff1cba9.tar.xz
zynq: move static peripheral mappings
Shifting them up into the vmalloc region prevents the following warning, when booting a zynq qemu target with more than 512mb of RAM: BUG: mapping for 0xe0000000 at 0xe0000000 out of vmalloc space In addition, it allows for reuse of these mappings when the proper drivers issue requests via ioremap(). There are currently unknown issues with the early uart mapping. For now, the uart will be mapped to a known working address. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq/include')
-rw-r--r--arch/arm/mach-zynq/include/mach/zynq_soc.h25
1 files changed, 15 insertions, 10 deletions
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index 218283a94247..1b8bf0ecbcb0 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -15,27 +15,32 @@
#ifndef __MACH_XILINX_SOC_H__
#define __MACH_XILINX_SOC_H__
+#include <asm/pgtable.h>
+
#define PERIPHERAL_CLOCK_RATE 2500000
-/* For now, all mappings are flat (physical = virtual)
+/* Static peripheral mappings are mapped at the top of the vmalloc region. The
+ * early uart mapping causes intermediate problems/failure at certain
+ * addresses, including the very top of the vmalloc region. Map it at an
+ * address that is known to work.
*/
-#define UART0_PHYS 0xE0000000
-#define UART0_VIRT UART0_PHYS
+#define UART0_PHYS 0xE0000000
+#define UART0_SIZE SZ_4K
+#define UART0_VIRT 0xF0001000
-#define TTC0_PHYS 0xF8001000
-#define TTC0_VIRT TTC0_PHYS
+#define TTC0_PHYS 0xF8001000
+#define TTC0_SIZE SZ_4K
+#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE)
-#define SCU_PERIPH_PHYS 0xF8F00000
-#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
+#define SCU_PERIPH_PHYS 0xF8F00000
+#define SCU_PERIPH_SIZE SZ_8K
+#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
/* The following are intended for the devices that are mapped early */
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
-/*
- * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
- */
#define LL_UART_PADDR UART0_PHYS
#define LL_UART_VADDR UART0_VIRT