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authorLinus Torvalds <torvalds@linux-foundation.org>2014-10-09 01:13:04 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-09 01:13:04 +0400
commitcf377ad7d42c566356d79049536d9cb37499cb77 (patch)
tree266371ff3a9462dcbaa9567e20c9a34722e3b32f /arch/arm/mach-tegra
parent212fe84a6f215c39795a76517c1c02114d428681 (diff)
parentd8f0faa339b0beff6e055218e10b2982422db540 (diff)
downloadlinux-cf377ad7d42c566356d79049536d9cb37499cb77.tar.xz
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann: "New and updated SoC support. Among the things new for this release are: - at91: Added support for the new SAMA5D4 SoC, following the earlier SAMA5D3 - bcm: Added support for BCM63XX family of DSL SoCs - hisi: Added support for HiP04 server-class SoC - meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform - shmobile: added support for new r8a7794 (R-Car E2) automotive SoC Noteworthy changes to existing SoC support are: - imx: convert i.MX1 to device tree - omap: lots of power management work - omap: base support to enable moving to standard UART driver - shmobile: lots of progress for multiplatform support, still ongoing" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (171 commits) ARM: hisi: depend on ARCH_MULTI_V7 CNS3xxx: Fix debug UART. ARM: at91: fix nommu build regression ARM: meson: add basic support for MesonX SoCs ARM: meson: debug: add debug UART for earlyprintk support irq: Export handle_fasteoi_irq ARM: mediatek: Add earlyprintk support for mt6589 ARM: hisi: Fix platmcpm compilation when ARMv6 is selected ARM: debug: fix alphanumerical order on debug uarts ARM: at91: document Atmel SMART compatibles ARM: at91: add sama5d4 support to sama5_defconfig ARM: at91: dt: add device tree file for SAMA5D4ek board ARM: at91: dt: add device tree file for SAMA5D4 SoC ARM: at91: SAMA5D4 SoC detection code and low level routines ARM: at91: introduce basic SAMA5D4 support clk: at91: add a driver for the h32mx clock ARM: pxa3xx: provide specific platform_devices for all ssp ports ARM: pxa: ssp: provide platform_device_id for PXA3xx ARM: OMAP4+: Remove static iotable mappings for SRAM ARM: OMAP4+: Move SRAM data to DT ...
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/flowctrl.c44
-rw-r--r--arch/arm/mach-tegra/flowctrl.h2
-rw-r--r--arch/arm/mach-tegra/tegra.c2
3 files changed, 41 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index ec55d1de1b55..475e783992fd 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -22,11 +22,12 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <soc/tegra/fuse.h>
#include "flowctrl.h"
-#include "iomap.h"
static u8 flowctrl_offset_halt_cpu[] = {
FLOW_CTRL_HALT_CPU0_EVENTS,
@@ -42,23 +43,22 @@ static u8 flowctrl_offset_cpu_csr[] = {
FLOW_CTRL_CPU1_CSR + 16,
};
+static void __iomem *tegra_flowctrl_base;
+
static void flowctrl_update(u8 offset, u32 value)
{
- void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
-
- writel(value, addr);
+ writel(value, tegra_flowctrl_base + offset);
/* ensure the update has reached the flow controller */
wmb();
- readl_relaxed(addr);
+ readl_relaxed(tegra_flowctrl_base + offset);
}
u32 flowctrl_read_cpu_csr(unsigned int cpuid)
{
u8 offset = flowctrl_offset_cpu_csr[cpuid];
- void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
- return readl(addr);
+ return readl(tegra_flowctrl_base + offset);
}
void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
@@ -139,3 +139,33 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid)
reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event */
flowctrl_write_cpu_csr(cpuid, reg);
}
+
+static const struct of_device_id matches[] __initconst = {
+ { .compatible = "nvidia,tegra124-flowctrl" },
+ { .compatible = "nvidia,tegra114-flowctrl" },
+ { .compatible = "nvidia,tegra30-flowctrl" },
+ { .compatible = "nvidia,tegra20-flowctrl" },
+ { }
+};
+
+void __init tegra_flowctrl_init(void)
+{
+ /* hardcoded fallback if device tree node is missing */
+ unsigned long base = 0x60007000;
+ unsigned long size = SZ_4K;
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, matches);
+ if (np) {
+ struct resource res;
+
+ if (of_address_to_resource(np, 0, &res) == 0) {
+ size = resource_size(&res);
+ base = res.start;
+ }
+
+ of_node_put(np);
+ }
+
+ tegra_flowctrl_base = ioremap_nocache(base, size);
+}
diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
index c89aac60a143..73a9c5016c1a 100644
--- a/arch/arm/mach-tegra/flowctrl.h
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -59,6 +59,8 @@ void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);
void flowctrl_cpu_suspend_enter(unsigned int cpuid);
void flowctrl_cpu_suspend_exit(unsigned int cpuid);
+
+void tegra_flowctrl_init(void);
#endif
#endif
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 5ef5173dec83..ef016af1c9e7 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -48,6 +48,7 @@
#include "board.h"
#include "common.h"
#include "cpuidle.h"
+#include "flowctrl.h"
#include "iomap.h"
#include "irq.h"
#include "pm.h"
@@ -74,6 +75,7 @@ static void __init tegra_init_early(void)
{
of_register_trusted_foundations();
tegra_cpu_reset_handler_init();
+ tegra_flowctrl_init();
}
static void __init tegra_dt_init_irq(void)