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authorMagnus Damm <damm+renesas@opensource.se>2015-01-26 09:19:20 +0300
committerSimon Horman <horms+renesas@verge.net.au>2015-02-24 00:45:25 +0300
commit59b89af1d5551c12bf710840d5215a186607ca23 (patch)
tree816f5bdbdc613fd4a91a60a1ddb91a59b04c3a4d /arch/arm/mach-shmobile/entry-intc.S
parent10c7fcbd0f00a0d7e6039fcfcb04dca80c0ff362 (diff)
downloadlinux-59b89af1d5551c12bf710840d5215a186607ca23.tar.xz
ARM: shmobile: sh7372: Remove Legacy C SoC code
Remove support for the legacy Cortex-A8 based sh7372 SoC. The Linux kernel still lacks DT bindings for the sh7372 INTC interrupt controller so DT multiplatform support is not possibile. Also, the sh7372 SoC never went into mass production anyway so to aid migration to DT multiplatform simply get rid of sh7372 support. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/entry-intc.S')
-rw-r--r--arch/arm/mach-shmobile/entry-intc.S54
1 files changed, 0 insertions, 54 deletions
diff --git a/arch/arm/mach-shmobile/entry-intc.S b/arch/arm/mach-shmobile/entry-intc.S
deleted file mode 100644
index 1a1c00ca39a2..000000000000
--- a/arch/arm/mach-shmobile/entry-intc.S
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * ARM Interrupt demux handler using INTC
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/entry-macro-multi.S>
-
-#define INTCA_BASE 0xe6980000
-#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
-#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
-#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
-#define INTLVLB_OFFS 0x00000034 /* previous priority level */
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =INTCA_BASE
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- /* The single INTFLGA read access below results in the following:
- *
- * 1. INTLVLB is updated with old priority value from INTLVLA
- * 2. Highest priority interrupt is accepted
- * 3. INTLVLA is updated to contain priority of accepted interrupt
- * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
- */
- ldr \irqnr, [\base, #INTFLGA_OFFS]
-
- /* Restore INTLVLA with the value saved in INTLVLB.
- * This is required to support interrupt priorities properly.
- */
- ldrb \tmp, [\base, #INTLVLB_OFFS]
- strb \tmp, [\base, #INTLVLA_OFFS]
-
- /* Handle invalid vector number case */
- cmp \irqnr, #0
- beq 1000f
-
- /* Convert vector to irq number, same as the evt2irq() macro */
- lsr \irqnr, \irqnr, #0x5
- subs \irqnr, \irqnr, #16
-
-1000:
- .endm
-
- .macro test_for_ipi, irqnr, irqstat, base, tmp
- .endm
-
- arch_irq_handler shmobile_handle_irq_intc