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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-14 03:05:12 +0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-02-04 18:32:24 +0400
commit7cf779cb8ddeef797a3a265889c7f088d42a12f7 (patch)
tree6533ca24db08d6bdfb42a257787ffb54c1ca41aa /arch/arm/mach-sa1100/include
parentbbb58a1210c6fdc68b09f7b9e12096c2a1886aa1 (diff)
downloadlinux-7cf779cb8ddeef797a3a265889c7f088d42a12f7.tar.xz
PCMCIA: sa11x0: nanoengine: convert to use new irq/gpio management
Convert Nanoengine socket driver to use the new irq/gpio management. This is slightly more involved because we have to touch the private platform header file to modify the GPIO bitmasks to be GPIO numbers. Acked-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/include')
-rw-r--r--arch/arm/mach-sa1100/include/mach/nanoengine.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
index 14f8382d0665..ad24c6c37402 100644
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h
@@ -16,10 +16,10 @@
#include <mach/irqs.h>
-#define GPIO_PC_READY0 GPIO_GPIO(11) /* ready for socket 0 (active high)*/
-#define GPIO_PC_READY1 GPIO_GPIO(12) /* ready for socket 1 (active high) */
-#define GPIO_PC_CD0 GPIO_GPIO(13) /* detect for socket 0 (active low) */
-#define GPIO_PC_CD1 GPIO_GPIO(14) /* detect for socket 1 (active low) */
+#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/
+#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */
+#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */
+#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */
#define GPIO_PC_RESET0 GPIO_GPIO(15) /* reset socket 0 */
#define GPIO_PC_RESET1 GPIO_GPIO(16) /* reset socket 1 */