diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2011-05-31 08:10:26 +0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2011-05-31 08:10:26 +0400 |
| commit | 8181d3ef26ed1d9eb21e2cdcac374e1f457fdc06 (patch) | |
| tree | 1a081f09ebcf2a84de899ddeadd0e4c5e48b50d2 /arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h | |
| parent | 54525552c6ccfd867e819845da14be994e303218 (diff) | |
| parent | 55922c9d1b84b89cb946c777fddccb3247e7df2c (diff) | |
| download | linux-8181d3ef26ed1d9eb21e2cdcac374e1f457fdc06.tar.xz | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh-fixes-for-linus
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h')
| -rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h deleted file mode 100644 index b94954af1598..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h +++ /dev/null @@ -1,42 +0,0 @@ -/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * GPIO Bank G register and configuration definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define S3C64XX_GPGCON (S3C64XX_GPG_BASE + 0x00) -#define S3C64XX_GPGDAT (S3C64XX_GPG_BASE + 0x04) -#define S3C64XX_GPGPUD (S3C64XX_GPG_BASE + 0x08) -#define S3C64XX_GPGCONSLP (S3C64XX_GPG_BASE + 0x0c) -#define S3C64XX_GPGPUDSLP (S3C64XX_GPG_BASE + 0x10) - -#define S3C64XX_GPG_CONMASK(__gpio) (0xf << ((__gpio) * 4)) -#define S3C64XX_GPG_INPUT(__gpio) (0x0 << ((__gpio) * 4)) -#define S3C64XX_GPG_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) - -#define S3C64XX_GPG0_MMC0_CLK (0x02 << 0) -#define S3C64XX_GPG0_EINT_G5_0 (0x07 << 0) - -#define S3C64XX_GPG1_MMC0_CMD (0x02 << 4) -#define S3C64XX_GPG1_EINT_G5_1 (0x07 << 4) - -#define S3C64XX_GPG2_MMC0_DATA0 (0x02 << 8) -#define S3C64XX_GPG2_EINT_G5_2 (0x07 << 8) - -#define S3C64XX_GPG3_MMC0_DATA1 (0x02 << 12) -#define S3C64XX_GPG3_EINT_G5_3 (0x07 << 12) - -#define S3C64XX_GPG4_MMC0_DATA2 (0x02 << 16) -#define S3C64XX_GPG4_EINT_G5_4 (0x07 << 16) - -#define S3C64XX_GPG5_MMC0_DATA3 (0x02 << 20) -#define S3C64XX_GPG5_EINT_G5_5 (0x07 << 20) - |