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author | Olof Johansson <olof@lixom.net> | 2012-03-08 20:53:14 +0400 |
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committer | Olof Johansson <olof@lixom.net> | 2012-03-08 20:53:14 +0400 |
commit | d60d506e6baaf423148c458df3ece0c1d440dce4 (patch) | |
tree | c25c44e70ebaaddcbe39559df5c5cd260e956be4 /arch/arm/mach-s3c24xx/dma-s3c2440.c | |
parent | 62f383435932ea3d271bee6b957de048452c1b16 (diff) | |
parent | 2e5ac9436645bb9fd2097868e228321f303c9c75 (diff) | |
download | linux-d60d506e6baaf423148c458df3ece0c1d440dce4.tar.xz |
Merge branch 'next/cleanup-s3c24xx' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
* 'next/cleanup-s3c24xx' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (24 commits)
ARM: S3C24XX: remove call to s3c24xx_setup_clocks
ARM: S3C24XX: add get_rate for clk_p on S3C2416/2443
ARM: S3C24XX: add get_rate for clk_h on S3C2416/2443
ARM: S3C24XX: remove XXX_setup_clocks method from S3C2443
ARM: S3C24XX: remove obsolete S3C2416_DMA option
ARM: S3C24XX: Reuse S3C2443 dma for S3C2416
ARM: S3C24XX: Fix indentation of dma-s3c2443
ARM: S3C24XX: Move device setup files to mach directory
ARM: S3C24XX: Consolidate Simtec extensions
ARM: S3C24XX: move simtec-specific code to mach directory
ARM: S3C24XX: Move common-smdk code to mach directory
ARM: S3C24XX: Move s3c2443-clock.c to mach-s3c24xx
ARM: s3c2410_defconfig: update s3c2410_defconfig
ARM: S3C2443: move mach-s3c2443/* into mach-s3c24xx/
ARM: S3C2440: move mach-s3c2440/* into mach-s3c24xx/
ARM: S3C2416: move mach-s3c2416/* into mach-s3c24xx/
ARM: S3C2412: move mach-s3c2412/* into mach-s3c24xx/
ARM: S3C2410: move mach-s3c2410/* into mach-s3c24xx/
ARM: S3C24XX: change the ARCH_S3C2410 to ARCH_S3C24XX
ARM: S3C2410: move s3c2410_baseclk_add to clock.h
...
Diffstat (limited to 'arch/arm/mach-s3c24xx/dma-s3c2440.c')
-rw-r--r-- | arch/arm/mach-s3c24xx/dma-s3c2440.c | 197 |
1 files changed, 197 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2440.c b/arch/arm/mach-s3c24xx/dma-s3c2440.c new file mode 100644 index 000000000000..5f0a0c8ef84f --- /dev/null +++ b/arch/arm/mach-s3c24xx/dma-s3c2440.c @@ -0,0 +1,197 @@ +/* linux/arch/arm/mach-s3c2440/dma.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2440 DMA selection + * + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/serial_core.h> + +#include <mach/map.h> +#include <mach/dma.h> + +#include <plat/dma-s3c24xx.h> +#include <plat/cpu.h> + +#include <plat/regs-serial.h> +#include <mach/regs-gpio.h> +#include <plat/regs-ac97.h> +#include <plat/regs-dma.h> +#include <mach/regs-mem.h> +#include <mach/regs-lcd.h> +#include <mach/regs-sdi.h> +#include <plat/regs-iis.h> +#include <plat/regs-spi.h> + +static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { + [DMACH_XD0] = { + .name = "xdreq0", + .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID, + }, + [DMACH_XD1] = { + .name = "xdreq1", + .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID, + }, + [DMACH_SDI] = { + .name = "sdi", + .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, + .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID, + .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, + .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, + }, + [DMACH_SPI0] = { + .name = "spi0", + .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, + }, + [DMACH_SPI1] = { + .name = "spi1", + .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, + }, + [DMACH_UART0] = { + .name = "uart0", + .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, + }, + [DMACH_UART1] = { + .name = "uart1", + .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, + }, + [DMACH_UART2] = { + .name = "uart2", + .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, + }, + [DMACH_TIMER] = { + .name = "timer", + .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID, + .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID, + .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID, + }, + [DMACH_I2S_IN] = { + .name = "i2s-sdi", + .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, + .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, + }, + [DMACH_I2S_OUT] = { + .name = "i2s-sdo", + .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID, + .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, + }, + [DMACH_PCM_IN] = { + .name = "pcm-in", + .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID, + .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID, + }, + [DMACH_PCM_OUT] = { + .name = "pcm-out", + .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID, + .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID, + }, + [DMACH_MIC_IN] = { + .name = "mic-in", + .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID, + .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID, + }, + [DMACH_USB_EP1] = { + .name = "usb-ep1", + .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID, + }, + [DMACH_USB_EP2] = { + .name = "usb-ep2", + .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID, + }, + [DMACH_USB_EP3] = { + .name = "usb-ep3", + .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID, + }, + [DMACH_USB_EP4] = { + .name = "usb-ep4", + .channels[3] = S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID, + }, +}; + +static void s3c2440_dma_select(struct s3c2410_dma_chan *chan, + struct s3c24xx_dma_map *map) +{ + chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID; +} + +static struct s3c24xx_dma_selection __initdata s3c2440_dma_sel = { + .select = s3c2440_dma_select, + .dcon_mask = 7 << 24, + .map = s3c2440_dma_mappings, + .map_size = ARRAY_SIZE(s3c2440_dma_mappings), +}; + +static struct s3c24xx_dma_order __initdata s3c2440_dma_order = { + .channels = { + [DMACH_SDI] = { + .list = { + [0] = 3 | DMA_CH_VALID, + [1] = 2 | DMA_CH_VALID, + [2] = 1 | DMA_CH_VALID, + [3] = 0 | DMA_CH_VALID, + }, + }, + [DMACH_I2S_IN] = { + .list = { + [0] = 1 | DMA_CH_VALID, + [1] = 2 | DMA_CH_VALID, + }, + }, + [DMACH_I2S_OUT] = { + .list = { + [0] = 2 | DMA_CH_VALID, + [1] = 1 | DMA_CH_VALID, + }, + }, + [DMACH_PCM_IN] = { + .list = { + [0] = 2 | DMA_CH_VALID, + [1] = 1 | DMA_CH_VALID, + }, + }, + [DMACH_PCM_OUT] = { + .list = { + [0] = 1 | DMA_CH_VALID, + [1] = 3 | DMA_CH_VALID, + }, + }, + [DMACH_MIC_IN] = { + .list = { + [0] = 3 | DMA_CH_VALID, + [1] = 2 | DMA_CH_VALID, + }, + }, + }, +}; + +static int __init s3c2440_dma_add(struct device *dev, + struct subsys_interface *sif) +{ + s3c2410_dma_init(); + s3c24xx_dma_order_set(&s3c2440_dma_order); + return s3c24xx_dma_init_map(&s3c2440_dma_sel); +} + +static struct subsys_interface s3c2440_dma_interface = { + .name = "s3c2440_dma", + .subsys = &s3c2440_subsys, + .add_dev = s3c2440_dma_add, +}; + +static int __init s3c2440_dma_init(void) +{ + return subsys_interface_register(&s3c2440_dma_interface); +} + +arch_initcall(s3c2440_dma_init); + |