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authorDavid S. Miller <davem@davemloft.net>2015-05-13 21:31:43 +0300
committerDavid S. Miller <davem@davemloft.net>2015-05-13 21:31:43 +0300
commitb04096ff33a977c01c8780ca3ee129dbd641bad4 (patch)
tree8652f27f158984e5aa4c00ddf1a4885a32435f28 /arch/arm/mach-rockchip/rockchip.c
parent7f460d30c8e130382de1443fdbc4d040a9e062ec (diff)
parent110bc76729d448fdbcb5cdb63b83d9fd65ce5e26 (diff)
downloadlinux-b04096ff33a977c01c8780ca3ee129dbd641bad4.tar.xz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Four minor merge conflicts: 1) qca_spi.c renamed the local variable used for the SPI device from spi_device to spi, meanwhile the spi_set_drvdata() call got moved further up in the probe function. 2) Two changes were both adding new members to codel params structure, and thus we had overlapping changes to the initializer function. 3) 'net' was making a fix to sk_release_kernel() which is completely removed in 'net-next'. 4) In net_namespace.c, the rtnl_net_fill() call for GET operations had the command value fixed, meanwhile 'net-next' adjusted the argument signature a bit. This also matches example merge resolutions posted by Stephen Rothwell over the past two days. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm/mach-rockchip/rockchip.c')
-rw-r--r--arch/arm/mach-rockchip/rockchip.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c
index d360ec044b66..b6cf3b449428 100644
--- a/arch/arm/mach-rockchip/rockchip.c
+++ b/arch/arm/mach-rockchip/rockchip.c
@@ -30,11 +30,30 @@
#include "pm.h"
#define RK3288_GRF_SOC_CON0 0x244
+#define RK3288_TIMER6_7_PHYS 0xff810000
static void __init rockchip_timer_init(void)
{
if (of_machine_is_compatible("rockchip,rk3288")) {
struct regmap *grf;
+ void __iomem *reg_base;
+
+ /*
+ * Most/all uboot versions for rk3288 don't enable timer7
+ * which is needed for the architected timer to work.
+ * So make sure it is running during early boot.
+ */
+ reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
+ if (reg_base) {
+ writel(0, reg_base + 0x30);
+ writel(0xffffffff, reg_base + 0x20);
+ writel(0xffffffff, reg_base + 0x24);
+ writel(1, reg_base + 0x30);
+ dsb();
+ iounmap(reg_base);
+ } else {
+ pr_err("rockchip: could not map timer7 registers\n");
+ }
/*
* Disable auto jtag/sdmmc switching that causes issues