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authorPaul Walmsley <paul@pwsan.com>2012-01-30 13:47:24 +0400
committerKevin Hilman <khilman@ti.com>2012-03-06 03:38:02 +0400
commit506c7d7931317813b3142f57d44bf113102a2a8f (patch)
tree7a50f9f30ef7429935a92e8a58c6cbbb66cb9bad /arch/arm/mach-omap2
parent015f1e4297ad32f83251f3f4cee2389ce5516e9e (diff)
downloadlinux-506c7d7931317813b3142f57d44bf113102a2a8f.tar.xz
ARM: OMAP3: PM: remove superfluous calls to pwrdm_clear_all_prev_pwrst()
Remove some superfluous calls to pwrdm_clear_all_prev_pwrst(). pwrdm_pre_transition(), which appears a few lines after these calls, invokes pwrdm_clear_all_prev_pwrst() on each powerdomain -- there's no need to do it twice. N.B.: some of us have observed that accesses to the previous powerstate registers seem to be quite slow. Although the writes removed by this patch should be buffered by the write buffer, there is a read to a PRM register immediately afterwards. That will block the OMAP3 MPU until all of those writes complete. So this patch should result in a minor performance improvement during idle entry. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tero Kristo <t-kristo@ti.com> [khilman@ti.com: removed a couple more for OMAP4] Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c2
-rw-r--r--arch/arm/mach-omap2/pm34xx.c5
2 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 1d5d01056558..bbabe1d83249 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -263,12 +263,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
* In MPUSS OSWR or device OFF, interrupt controller contest is lost.
*/
mpuss_clear_prev_logic_pwrst();
- pwrdm_clear_all_prev_pwrst(mpuss_pd);
if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) &&
(pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
save_state = 2;
- clear_cpu_prev_pwrst(cpu);
cpu_clear_prev_logic_pwrst(cpu);
set_cpu_next_pwrst(cpu, power_state);
set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b77df735fa6c..60279b3502d9 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -290,11 +290,6 @@ void omap_sram_idle(void)
int core_prev_state, per_prev_state;
u32 sdrc_pwr = 0;
- pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
- pwrdm_clear_all_prev_pwrst(neon_pwrdm);
- pwrdm_clear_all_prev_pwrst(core_pwrdm);
- pwrdm_clear_all_prev_pwrst(per_pwrdm);
-
mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
switch (mpu_next_state) {
case PWRDM_POWER_ON: