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authorSteve French <sfrench@us.ibm.com>2011-01-10 02:18:16 +0300
committerSteve French <sfrench@us.ibm.com>2011-01-10 02:18:16 +0300
commitacc6f11272ce4f77c40b1a6292eb198fd6aaf8c3 (patch)
tree2da3a61b6726707a89f1cf93446aabd2fb00e1f0 /arch/arm/mach-omap2/sram34xx.S
parent7e12eddb73d4f288b0339ee13832a34d6bc4fd90 (diff)
parent0c21e3aaf6ae85bee804a325aa29c325209180fd (diff)
downloadlinux-acc6f11272ce4f77c40b1a6292eb198fd6aaf8c3.tar.xz
Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: fs/cifs/dir.c
Diffstat (limited to 'arch/arm/mach-omap2/sram34xx.S')
-rw-r--r--arch/arm/mach-omap2/sram34xx.S8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 3637274af5be..7f893a29d500 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -32,7 +32,7 @@
#include <mach/io.h>
#include "sdrc.h"
-#include "cm.h"
+#include "cm2xxx_3xxx.h"
.text
@@ -104,6 +104,12 @@
* touching the SDRAM. Until that time, users who know that their use case
* can satisfy the above requirement can enable the CONFIG_OMAP3_SDRC_AC_TIMING
* option.
+ *
+ * Richard Woodruff notes that any changes to this code must be carefully
+ * audited and tested to ensure that they don't cause a TLB miss while
+ * the SDRAM is inaccessible. Such a situation will crash the system
+ * since it will cause the ARM MMU to attempt to walk the page tables.
+ * These crashes may be intermittent.
*/
ENTRY(omap3_sram_configure_core_dpll)
stmfd sp!, {r1-r12, lr} @ store regs to stack