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| author | David S. Miller <davem@davemloft.net> | 2009-06-15 14:02:23 +0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-06-15 14:02:23 +0400 |
| commit | 9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (patch) | |
| tree | 8d104ec2a459346b99413b0b77421ca7b9936c1a /arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h | |
| parent | ca44d6e60f9de26281fda203f58b570e1748c015 (diff) | |
| parent | 45e3e1935e2857c54783291107d33323b3ef33c8 (diff) | |
| download | linux-9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb.tar.xz | |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
Documentation/feature-removal-schedule.txt
drivers/scsi/fcoe/fcoe.c
net/core/drop_monitor.c
net/core/net-traces.c
Diffstat (limited to 'arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h')
| -rw-r--r-- | arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h new file mode 100644 index 000000000000..3751d293cb1f --- /dev/null +++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h @@ -0,0 +1,54 @@ +/* + * SDRC register values for the Qimonda HYB18M512160AF-6 + * + * Copyright (C) 2008-2009 Texas Instruments, Inc. + * Copyright (C) 2008-2009 Nokia Corporation + * + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 +#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 + +#include <mach/sdrc.h> + +/* Qimonda HYB18M512160AF-6 */ +static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = { + [0] = { + .rate = 166000000, + .actim_ctrla = 0x629db4c6, + .actim_ctrlb = 0x00012214, + .rfr_ctrl = 0x0004dc01, + .mr = 0x00000032, + }, + [1] = { + .rate = 165941176, + .actim_ctrla = 0x629db4c6, + .actim_ctrlb = 0x00012214, + .rfr_ctrl = 0x0004dc01, + .mr = 0x00000032, + }, + [2] = { + .rate = 83000000, + .actim_ctrla = 0x31512283, + .actim_ctrlb = 0x0001220a, + .rfr_ctrl = 0x00025501, + .mr = 0x00000022, + }, + [3] = { + .rate = 82970588, + .actim_ctrla = 0x31512283, + .actim_ctrlb = 0x0001220a, + .rfr_ctrl = 0x00025501, + .mr = 0x00000022, + }, + [4] = { + .rate = 0 + }, +}; + +#endif |