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| author | Tony Lindgren <tony@atomide.com> | 2019-10-16 17:37:06 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2019-10-16 17:51:16 +0300 |
| commit | caf8c87d7ff2037b502e76ce450565e9bd32a819 (patch) | |
| tree | d83471f77ad6e72193778bab4efff1411d0bb8a7 /arch/arm/mach-omap2/pmic-cpcap.c | |
| parent | 623429d5b9011cc56538bc70fced765d7c42e622 (diff) | |
| download | linux-caf8c87d7ff2037b502e76ce450565e9bd32a819.tar.xz | |
ARM: OMAP2+: Allow core oswr for omap4
Commit f74297dd9354 ("ARM: OMAP2+: Make sure LOGICRETSTATE bits are not
cleared") disabled oswr (open switch retention) for per and core domains
as various GPIO related issues were noticed if the bootloader had
configured the bits for LOGICRETSTATE for per and core domains.
With the recent gpio-omap fixes, mostly related to commit e6818d29ea15
("gpio: gpio-omap: configure edge detection for level IRQs for idle
wakeup"), things now behave for enabling core oswr for omap4.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/pmic-cpcap.c')
0 files changed, 0 insertions, 0 deletions